diff options
| author | Marek Olšák <[email protected]> | 2018-05-02 19:28:44 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-05-10 18:40:03 -0400 |
| commit | e9c08bc658543d3bc5f3907f571920ae5c736e12 (patch) | |
| tree | 71e64922efb0400100d7ca72cd2ad8f3a4aa03ad /src/gallium | |
| parent | 64265ac8d53367c143050df9a8b08b224185e9ae (diff) | |
ac/gpu_info: add has_indirect_compute_dispatch
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_get.c | 16 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 |
2 files changed, 8 insertions, 13 deletions
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index cd3e63c73d7..0e7d28e334c 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -83,16 +83,6 @@ const char *si_get_family_name(const struct si_screen *sscreen) } } -static bool si_have_tgsi_compute(struct si_screen *sscreen) -{ - /* Old kernels disallowed some register writes for SI - * that are used for indirect dispatches. */ - return (sscreen->info.chip_class >= CIK || - sscreen->info.drm_major == 3 || - (sscreen->info.drm_major == 2 && - sscreen->info.drm_minor >= 45)); -} - static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) { struct si_screen *sscreen = (struct si_screen *)pscreen; @@ -225,7 +215,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 4; case PIPE_CAP_GLSL_FEATURE_LEVEL: - if (si_have_tgsi_compute(sscreen)) + if (sscreen->info.has_indirect_compute_dispatch) return 450; return 420; @@ -294,7 +284,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return sscreen->info.has_fence_to_handle; case PIPE_CAP_QUERY_BUFFER_OBJECT: - return si_have_tgsi_compute(sscreen); + return sscreen->info.has_indirect_compute_dispatch; case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_MULTI_DRAW_INDIRECT: @@ -408,7 +398,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: { int ir = 1 << PIPE_SHADER_IR_NATIVE; - if (si_have_tgsi_compute(sscreen)) + if (sscreen->info.has_indirect_compute_dispatch) ir |= 1 << PIPE_SHADER_IR_TGSI; return ir; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 1b029e94969..129d4f46f5b 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -539,6 +539,11 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) ws->info.has_eqaa_surface_allocator = false; ws->info.has_format_bc1_through_bc7 = ws->info.drm_minor >= 31; ws->info.kernel_flushes_tc_l2_after_ib = true; + /* Old kernels disallowed register writes via COPY_DATA + * that are used for indirect compute dispatches. */ + ws->info.has_indirect_compute_dispatch = ws->info.chip_class == CIK || + (ws->info.chip_class == SI && + ws->info.drm_minor >= 45); ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; |