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authorKenneth Graunke <[email protected]>2019-06-26 17:35:45 -0700
committerKenneth Graunke <[email protected]>2019-06-27 08:12:22 -0700
commitf94ebf0c9db8dcd2257fd7eb20d457caad3bdeef (patch)
tree7953077a589a31fb8385462196e6f79cae2268df /src/gallium
parent62c60595844ba206dcf0f18451609e03ee65a7d3 (diff)
iris: Properly align interface descriptor data addresses
MEDIA_INTERFACE_DESCRIPTOR's Interface Descriptor Data Start Address field's docs say: "This bit specifies the 64-byte aligned address..." And we were doing 32. Superfluous thread ID uploading was apparently saving us from GPU hangs in most cases.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/iris/iris_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index bf31f31f3e4..80c574845b0 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5567,7 +5567,7 @@ iris_upload_compute_state(struct iris_context *ice,
GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
load.InterfaceDescriptorDataStartAddress =
emit_state(batch, ice->state.dynamic_uploader,
- &desc_res, desc, sizeof(desc), 32);
+ &desc_res, desc, sizeof(desc), 64);
}
pipe_resource_reference(&desc_res, NULL);