freedreno: a2xx: same gmem2mem sequence for all tiles

Set REG_A2XX_RB_COPY_DEST_OFFSET in the tile init as it won't get touched
by the draw batch. Then gmem2mem is the same for all tiles.

Similar to what is done in a6xx, but only for gmem2mem.

Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Rob Clark <[email protected]>

1 files changed, 25 insertions, 12 deletions

diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
index 867cb0a3d09..0c7ea844fa4 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
@@ -87,7 +87,7 @@ static void
 emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base,
 		struct pipe_surface *psurf)
 {
-	struct fd_ringbuffer *ring = batch->gmem;
+	struct fd_ringbuffer *ring = batch->tile_fini;
 	struct fd_resource *rsc = fd_resource(psurf->texture);
 	uint32_t swap = fmt2swap(psurf->format);
 	struct fd_resource_slice *slice =
@@ -135,13 +135,17 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base,
 }
 
 static void
-fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
+prepare_tile_fini_ib(struct fd_batch *batch)
 {
 	struct fd_context *ctx = batch->ctx;
 	struct fd2_context *fd2_ctx = fd2_context(ctx);
 	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	struct fd_ringbuffer *ring = batch->gmem;
 	struct pipe_framebuffer_state *pfb = &batch->framebuffer;
+	struct fd_ringbuffer *ring;
+
+	batch->tile_fini = fd_submit_new_ringbuffer(batch->submit, 0x1000,
+			FD_RINGBUFFER_STREAMING);
+	ring = batch->tile_fini;
 
 	fd2_emit_vertex_bufs(ring, 0x9c, (struct fd2_vertex_buf[]) {
 			{ .prsc = fd2_ctx->solid_vertexbuf, .size = 36 },
@@ -188,20 +192,15 @@ fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
 
 	OUT_PKT3(ring, CP_SET_CONSTANT, 5);
 	OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_XSCALE));
-	OUT_RING(ring, fui((float) tile->bin_w / 2.0)); /* XSCALE */
-	OUT_RING(ring, fui((float) tile->bin_w / 2.0)); /* XOFFSET */
-	OUT_RING(ring, fui((float) tile->bin_h / 2.0)); /* YSCALE */
-	OUT_RING(ring, fui((float) tile->bin_h / 2.0)); /* YOFFSET */
+	OUT_RING(ring, fui((float) gmem->bin_w / 2.0)); /* XSCALE */
+	OUT_RING(ring, fui((float) gmem->bin_w / 2.0)); /* XOFFSET */
+	OUT_RING(ring, fui((float) gmem->bin_h / 2.0)); /* YSCALE */
+	OUT_RING(ring, fui((float) gmem->bin_h / 2.0)); /* YOFFSET */
 
 	OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 	OUT_RING(ring, CP_REG(REG_A2XX_RB_MODECONTROL));
 	OUT_RING(ring, A2XX_RB_MODECONTROL_EDRAM_MODE(EDRAM_COPY));
 
-	OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-	OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_DEST_OFFSET));
-	OUT_RING(ring, A2XX_RB_COPY_DEST_OFFSET_X(tile->xoff) |
-			A2XX_RB_COPY_DEST_OFFSET_Y(tile->yoff));
-
 	if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL))
 		emit_gmem2mem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf);
 
@@ -219,6 +218,12 @@ fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
 	}
 }
 
+static void
+fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
+{
+	batch->ctx->emit_ib(batch->gmem, batch->tile_fini);
+}
+
 /* transfer from system memory to gmem */
 
 static void
@@ -484,6 +489,8 @@ fd2_emit_tile_init(struct fd_batch *batch)
 
 	fd2_emit_restore(ctx, ring);
 
+	prepare_tile_fini_ib(batch);
+
 	OUT_PKT3(ring, CP_SET_CONSTANT, 4);
 	OUT_RING(ring, CP_REG(REG_A2XX_RB_SURFACE_INFO));
 	OUT_RING(ring, gmem->bin_w);                 /* RB_SURFACE_INFO */
@@ -704,6 +711,12 @@ fd2_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
 	OUT_RING(ring, A2XX_PA_SC_SCREEN_SCISSOR_BR_X(tile->bin_w) |
 			A2XX_PA_SC_SCREEN_SCISSOR_BR_Y(tile->bin_h));
 
+	/* set the copy offset for gmem2mem */
+	OUT_PKT3(ring, CP_SET_CONSTANT, 2);
+	OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_DEST_OFFSET));
+	OUT_RING(ring, A2XX_RB_COPY_DEST_OFFSET_X(tile->xoff) |
+			A2XX_RB_COPY_DEST_OFFSET_Y(tile->yoff));
+
 	/* tile offset for gl_FragCoord on a20x (C64 in fragment shader) */
 	if (is_a20x(ctx->screen)) {
 		OUT_PKT3(ring, CP_SET_CONSTANT, 5);