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authorIlia Mirkin <[email protected]>2015-12-31 20:33:15 -0500
committerIlia Mirkin <[email protected]>2016-01-01 19:52:41 -0500
commitc1d14c6817e3fa9a1c04f9b6c51b4ca601637843 (patch)
tree68ed3f22186d577a49e97e4dbf031bb84579bca0 /src/gallium
parent33a415310b2d958319a4391f6b6d325d9c7292cc (diff)
nv50,nvc0: make sure there's pushbuf space and that we ref the bo early
First off, we can't flush in the middle of a command. Secondly requesting the extra push space might cause a flush to happen. If that flush happens, we'd have to do the PUSH_REFN again. So instead do PUSH_REFN after the push space request. This helps avoid rare crashes with supertuxkart in libdrm due to assertion failures. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0 11.1" <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv50_vbo.c2
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c1
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c1
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c7
4 files changed, 5 insertions, 6 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
index 7de2f1f1d0f..2d1aa6abcd2 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
@@ -636,8 +636,8 @@ nv50_draw_elements(struct nv50_context *nv50, bool shorten,
BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, prim);
- PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 8, 0, 1);
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
switch (index_size) {
case 4:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
index a70d524ea85..8021a65dc46 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
@@ -473,7 +473,6 @@ nvc0_hw_query_pushbuf_submit(struct nouveau_pushbuf *push,
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
PUSH_REFN(push, hq->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
- nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push, hq->bo, hq->offset + result_offset, 4 |
NVC0_IB_ENTRY_1_NO_PREFETCH);
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index 5e84ca9e0ea..dc02b011bdf 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -317,6 +317,7 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
if (!targ->clean)
nvc0_hw_query_fifo_wait(push, nvc0_query(targ->pq));
+ nouveau_pushbuf_space(push, 0, 0, 1);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
PUSH_DATA (push, 1);
PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
index 273451e638d..235b1afc24b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
@@ -787,7 +787,7 @@ nvc0_draw_stream_output(struct nvc0_context *nvc0,
}
while (num_instances--) {
- PUSH_SPACE(push, 8);
+ nouveau_pushbuf_space(push, 9, 0, 1);
BEGIN_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, mode);
BEGIN_NVC0(push, NVC0_3D(DRAW_TFB_BASE), 1);
@@ -822,7 +822,8 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
BEGIN_NVC0(push, NVC0_3D(CB_POS), 1);
PUSH_DATA (push, 256 + 128);
- PUSH_SPACE(push, 8);
+ nouveau_pushbuf_space(push, 8, 0, 1);
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
if (info->indexed) {
assert(nvc0->idxbuf.buffer);
assert(nouveau_resource_mapped_by_gpu(nvc0->idxbuf.buffer));
@@ -840,8 +841,6 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
}
PUSH_DATA(push, nvc0_prim_gl(info->mode));
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
- PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
- nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push,
buf->bo, offset, NVC0_IB_ENTRY_1_NO_PREFETCH | size);
}