diff options
| author | Marek Olšák <[email protected]> | 2019-07-30 17:10:59 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-08-06 17:08:39 -0400 |
| commit | b38f5eb17abb2c051ebe4d2be1077c069250e92a (patch) | |
| tree | 2a91a9af954ad438490ce8e7c7a08f14404c84c0 /src/gallium | |
| parent | e77772017396423504a57d0e031eea99c93ccdd9 (diff) | |
radeonsi: skip draw calls with 0-sized index buffers
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index a099805e43d..529b11c364a 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -868,6 +868,12 @@ static void si_emit_draw_packets(struct si_context *sctx, if (original_index_size) { index_max_size = (indexbuf->width0 - index_offset) / original_index_size; + /* Skip draw calls with 0-sized index buffers. + * They cause a hang on some chips, like Navi10-14. + */ + if (!index_max_size) + return; + index_va = si_resource(indexbuf)->gpu_address + index_offset; radeon_add_to_buffer_list(sctx, sctx->gfx_cs, |