diff options
author | Nicolai Hähnle <[email protected]> | 2019-05-04 12:37:36 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2019-06-12 20:28:23 -0400 |
commit | aa737e858050239c263b06d2646f9977876b5ba2 (patch) | |
tree | cc49115820c7cfb76b72c618b3829550efbd721d /src/gallium | |
parent | 33be5ad8a39ae2a490d5a6cf2fde6b7d3506f670 (diff) |
radeonsi: raise the alignment of LDS memory for compute shaders
This implies that the memory will always be at address 0, which allows
LLVM to generate slightly better code.
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 3617214ebef..ed2db3d0042 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2217,7 +2217,7 @@ void si_declare_compute_memory(struct si_shader_context *ctx) LLVMArrayType(ctx->i8, lds_size), "compute_lds", AC_ADDR_SPACE_LDS); - LLVMSetAlignment(var, 4); + LLVMSetAlignment(var, 64 * 1024); ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, var, i8p, ""); } |