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authorRob Clark <[email protected]>2018-04-26 14:52:09 -0400
committerRob Clark <[email protected]>2018-06-11 09:06:03 -0400
commita52e69821902f1eeac1f330113fab61da932dd2a (patch)
treeabf7264a15c7d248e427af4ceb854e47be162913 /src/gallium
parentfc1690c9d9c4179e241c75fa45d9cedd59ce1d10 (diff)
freedreno/ir3: propagate HALF flag across fanout
If we have a fanout (split) meta instruction to split the result of a vector instruction, propagate the HALF flag back to the original instruction. Otherwise result ends up in a full precision register while instruction(s) that use the result look in a half-precision register. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 3feb1ce0a5c..186171960e7 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -495,7 +495,10 @@ put_dst(struct ir3_context *ctx, nir_dest *dst)
if (bit_size < 32) {
for (unsigned i = 0; i < ctx->last_dst_n; i++) {
- ctx->last_dst[i]->regs[0]->flags |= IR3_REG_HALF;
+ struct ir3_instruction *dst = ctx->last_dst[i];
+ dst->regs[0]->flags |= IR3_REG_HALF;
+ if (ctx->last_dst[i]->opc == OPC_META_FO)
+ dst->regs[1]->instr->regs[0]->flags |= IR3_REG_HALF;
}
}