diff options
author | Marek Olšák <[email protected]> | 2019-09-16 22:31:48 -0400 |
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committer | Marek Olšák <[email protected]> | 2019-09-24 19:23:30 -0400 |
commit | 783fae2a1fcb61c92717921108cad7ef78daa36a (patch) | |
tree | 7e1b379e16fdfa8adb17797772a9930d1666ee07 /src/gallium | |
parent | 270fe55256c78ede507d75d4665d73936ea7db31 (diff) |
radeonsi: initialize displayable DCC using the retile blit to prevent hangs
Cc 19.2 <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 5f4fd60b09f..a8504f4e90c 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1448,9 +1448,17 @@ si_texture_create_object(struct pipe_screen *screen, } } - /* Upload the DCC retile map. */ + /* Initialize displayable DCC that requires the retile blit. */ if (tex->surface.dcc_retile_map_offset) { - /* Use a staging buffer for the upload, because + /* Uninitialized DCC can hang the display hw. + * Clear to white to indicate that. */ + si_screen_clear_buffer(sscreen, &tex->buffer.b.b, + tex->surface.display_dcc_offset, + tex->surface.u.gfx9.display_dcc_size, + DCC_CLEAR_COLOR_1111); + + /* Upload the DCC retile map. + * Use a staging buffer for the upload, because * the buffer backing the texture is unmappable. */ bool use_uint16 = tex->surface.u.gfx9.dcc_retile_use_uint16; |