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authorMarek Olšák <[email protected]>2019-06-05 01:37:01 -0400
committerMarek Olšák <[email protected]>2019-07-03 15:51:13 -0400
commit51db950419b810243468b6aa626b154b3fdc94f0 (patch)
treec3d8a82e6b92cfe1ea398d5cacfba1d7bb9ae442 /src/gallium
parent6920f09f4ba6a889bf4ef804cf65be7b5ecd0e43 (diff)
radeonsi/gfx10: disable DCC with MSAA
It was only enabled for 2x MSAA anyway. Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_texture.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 7b72e51065c..7bbffe359b3 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -289,10 +289,15 @@ static int si_init_surface(struct si_screen *sscreen,
flags |= RADEON_SURF_DISABLE_DCC;
/* GFX9: DCC clear for 4x and 8x MSAA textures unimplemented. */
- if (sscreen->info.chip_class >= GFX9 &&
+ if (sscreen->info.chip_class == GFX9 &&
ptex->nr_storage_samples >= 4)
flags |= RADEON_SURF_DISABLE_DCC;
+ /* TODO: GFX10: DCC causes corruption with MSAA. */
+ if (sscreen->info.chip_class >= GFX10 &&
+ ptex->nr_storage_samples >= 2)
+ flags |= RADEON_SURF_DISABLE_DCC;
+
if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {
/* This should catch bugs in gallium users setting incorrect flags. */
assert(ptex->nr_samples <= 1 &&