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authorMarek Olšák <[email protected]>2016-05-19 20:12:10 +0200
committerMarek Olšák <[email protected]>2016-06-01 17:35:30 +0200
commit12740efd29a4b17b721e4ca157ad3ae714c70842 (patch)
tree1c6e9fd338fba69cd40fdfaa39c1568ef42702ed /src/gallium
parentea68215c545ba9600d20718a372707be8e0f3905 (diff)
radeonsi: set correct stencil tile mode for texturing
Sadly, this doesn't affect SI and VI in any way. Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 6dcce3cdb08..71f4d713fce 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -342,12 +342,18 @@ static void si_set_sampler_view(struct si_context *sctx,
pipe_sampler_view_reference(&views->views[slot], view);
memcpy(desc, rview->state, 8*4);
- if (view->texture && view->texture->target != PIPE_BUFFER)
+ if (view->texture && view->texture->target != PIPE_BUFFER) {
+ bool is_separate_stencil =
+ rtex->is_depth && !rtex->is_flushing_texture &&
+ rview->is_stencil_sampler;
+
si_set_mutable_tex_desc_fields(rtex,
rview->base_level_info,
rview->base_level,
rview->block_width,
- false, desc);
+ is_separate_stencil,
+ desc);
+ }
if (view->texture && view->texture->target != PIPE_BUFFER &&
rtex->fmask.size) {