diff options
| author | Timothy Arceri <[email protected]> | 2019-09-20 16:54:31 +1000 |
|---|---|---|
| committer | Timothy Arceri <[email protected]> | 2019-09-25 02:42:55 +0000 |
| commit | 0e1310e59fa2c41efcc173f8a68523dc45432ab9 (patch) | |
| tree | ec00bd3745e0693d89be6bae58f6cbb34ef73a55 /src/gallium | |
| parent | e353fd096d6db1b19305cb1a634e25f2026ab8a7 (diff) | |
radeonsi/nir: lower load constants to scalar
We call nir_lower_load_const_to_scalar in the state trackers linker
however some later passes can reintroduce constant vectors. Here
we lower these to scalar and perform optimisations. The Intel
drivers do a similar call in their backend..
shader-db results VEGA 64:
Totals from affected shaders:
SGPRS: 152168 -> 151976 (-0.13 %)
VGPRS: 135224 -> 135112 (-0.08 %)
Spilled SGPRs: 4027 -> 4163 (3.38 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 10670028 -> 10654776 (-0.14 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 13122 -> 13135 (0.10 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader_nir.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 85cf53848e6..3bf30c72436 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -986,6 +986,11 @@ void si_lower_nir(struct si_shader_selector *sel) }; NIR_PASS_V(sel->nir, nir_lower_subgroups, &subgroups_options); + /* Lower load constants to scalar and then clean up the mess */ + NIR_PASS_V(sel->nir, nir_lower_load_const_to_scalar); + NIR_PASS_V(sel->nir, nir_lower_var_copies); + si_nir_opts(sel->nir); + /* Lower large variables that are always constant with load_constant * intrinsics, which get turned into PC-relative loads from a data * section next to the shader. |