diff options
| author | Nicolai Hähnle <[email protected]> | 2016-12-15 12:19:07 +0100 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-12-22 16:59:58 +0100 |
| commit | eca57f85ee1f47b32daa641a19d8d386c58eb1de (patch) | |
| tree | b55096e48acedd0b4c40cb958fcce35df2f73b36 /src/gallium | |
| parent | 3778a10d37cd0676ae6af03a059d7e80eb059245 (diff) | |
radeonsi: fix gl_ClipDistance and gl_ClipVertex for points
The clipper hardware doesn't consider points as primitives that can be
clipped. Simply setting the corresponding cull bits works, and should not
have an adverse effect on other primitive types according to the hardware
team.
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index afcd3ad26bc..11f9fb8449f 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -678,6 +678,15 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) } total_mask = clipdist_mask | culldist_mask; + /* Clip distances on points have no effect, so need to be implemented + * as cull distances. This applies for the clipvertex case as well. + * + * Setting this for primitives other than points should have no adverse + * effects. + */ + clipdist_mask &= rs->clip_plane_enable; + culldist_mask |= clipdist_mask; + misc_vec_ena = info->writes_psize || info->writes_edgeflag || info->writes_layer || info->writes_viewport_index; @@ -690,8 +699,7 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) | S_02881C_VS_OUT_MISC_VEC_ENA(misc_vec_ena) | S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) | - (rs->clip_plane_enable & - clipdist_mask) | (culldist_mask << 8)); + clipdist_mask | (culldist_mask << 8)); radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL, rs->pa_cl_clip_cntl | ucp_mask | |