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authorDave Airlie <[email protected]>2018-06-08 10:02:20 +1000
committerDave Airlie <[email protected]>2018-06-27 14:08:00 +1000
commita6b64d6dde5bb6f4fade2da98b22dae9de831fd6 (patch)
treeb67935e8e7ff208e01cfdec364c555a026ead8f2 /src/gallium
parentff6db94c18a585538058df59bd1025463bba2437 (diff)
virgl: add ARB_texture_view support
Reviewed-By: Gert Wollny <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/virgl/virgl_encode.c7
-rw-r--r--src/gallium/drivers/virgl/virgl_hw.h1
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c3
3 files changed, 8 insertions, 3 deletions
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index ad018bd1964..6b800d3d077 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -589,12 +589,15 @@ int virgl_encode_sampler_view(struct virgl_context *ctx,
const struct pipe_sampler_view *state)
{
unsigned elem_size = util_format_get_blocksize(state->format);
-
+ struct virgl_screen *rs = virgl_screen(ctx->base.screen);
uint32_t tmp;
+ uint32_t dword_fmt_target = state->format;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_SAMPLER_VIEW, VIRGL_OBJ_SAMPLER_VIEW_SIZE));
virgl_encoder_write_dword(ctx->cbuf, handle);
virgl_encoder_write_res(ctx, res);
- virgl_encoder_write_dword(ctx->cbuf, state->format);
+ if (rs->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW)
+ dword_fmt_target |= (state->target << 24);
+ virgl_encoder_write_dword(ctx->cbuf, dword_fmt_target);
if (res->u.b.target == PIPE_BUFFER) {
virgl_encoder_write_dword(ctx->cbuf, state->u.buf.offset / elem_size);
virgl_encoder_write_dword(ctx->cbuf, (state->u.buf.offset + state->u.buf.size) / elem_size - 1);
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index ee58520f9bb..d338051d9b3 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -200,6 +200,7 @@ enum virgl_formats {
/* These are used by the capability_bits field in virgl_caps_v2. */
#define VIRGL_CAP_NONE 0
#define VIRGL_CAP_TGSI_INVARIANT (1 << 0)
+#define VIRGL_CAP_TEXTURE_VIEW (1 << 1)
#define VIRGL_BIND_DEPTH_STENCIL (1 << 0)
#define VIRGL_BIND_RENDER_TARGET (1 << 1)
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 1eefbd6519f..8bd6673c3c9 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -217,6 +217,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v1.bset.has_fp64;
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
return vscreen->caps.caps.v2.max_shader_patch_varyings;
+ case PIPE_CAP_SAMPLER_VIEW_TARGET:
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_FAKE_SW_MSAA:
@@ -225,7 +227,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
- case PIPE_CAP_SAMPLER_VIEW_TARGET:
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_VERTEXID_NOBASE:
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: