diff options
| author | Nicolai Hähnle <[email protected]> | 2016-09-15 16:24:17 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-09-29 11:14:11 +0200 |
| commit | 8e4de009303e4755c833f9d96737d023119a08f6 (patch) | |
| tree | a73330bece717872096fd4c923b12f2a8e8ab2ab /src/gallium | |
| parent | 577e06095b1bd7c19b2eb2d574441d7242eb8751 (diff) | |
gallium/radeon: add barrier_flags to r600_common_screen
There are driver-specific context flags for barriers that are not covered
by the Gallium barrier interfaces.
The R600 settings of these flags may not be optimal, but we're not going
to use them yet anyway.
Reviewed-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/r600/r600_pipe.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 12 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 5 |
3 files changed, 23 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 271b7e1089e..635b76fd380 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -680,6 +680,12 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 && !(rscreen->b.debug_flags & DBG_NO_CP_DMA); + rscreen->b.barrier_flags.cp_to_L2 = + R600_CONTEXT_INV_VERTEX_CACHE | + R600_CONTEXT_INV_TEX_CACHE | + R600_CONTEXT_INV_CONST_CACHE; + rscreen->b.barrier_flags.compute_to_L2 = R600_CONTEXT_PS_PARTIAL_FLUSH; + rscreen->global_pool = compute_memory_pool_new(rscreen); /* Create the auxiliary context. This must be done last. */ diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index d9f22e49889..dd33eabcbff 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -415,6 +415,18 @@ struct r600_common_screen { */ unsigned dirty_tex_descriptor_counter; + struct { + /* Context flags to set so that all writes from earlier jobs + * in the CP are seen by L2 clients. + */ + unsigned cp_to_L2; + + /* Context flags to set so that all writes from earlier + * compute jobs are seen by L2 clients. + */ + unsigned compute_to_L2; + } barrier_flags; + void (*query_opaque_metadata)(struct r600_common_screen *rscreen, struct r600_texture *rtex, struct radeon_bo_metadata *md); diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 8f9e6f5caa2..730be9d55da 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -818,6 +818,11 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws) HAVE_LLVM < 0x0308 || (sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0; + sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 | + SI_CONTEXT_INV_VMEM_L1 | + SI_CONTEXT_INV_GLOBAL_L2; + sscreen->b.barrier_flags.compute_to_L2 = SI_CONTEXT_CS_PARTIAL_FLUSH; + if (debug_get_bool_option("RADEON_DUMP_SHADERS", false)) sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS; |