diff options
author | Samuel Pitoiset <[email protected]> | 2016-06-14 18:40:29 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2016-07-27 23:18:41 +0200 |
commit | 653af071197d6e06f67247e475a6206761aeeab2 (patch) | |
tree | e90f709539a3cc44e68c478fad47fe952127d872 /src/gallium | |
parent | 2060f19b4f7331299e597beee42be4c987b58762 (diff) |
nvc0: fix up TCP header on GM107+
The number of outputs patch (limited to 255) has moved in the TCP
header, but blob seems to also set the old position. Also, the high
8-bits are now located inbetween the min/max parallel output read
address at position 20.
Signed-off-by: Samuel Pitoiset <[email protected]>
Acked-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c index 5fc27534c6f..ae21789001a 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c @@ -346,6 +346,15 @@ nvc0_tcp_gen_header(struct nvc0_program *tcp, struct nv50_ir_prog_info *info) nvc0_vtgp_gen_header(tcp, info); + if (info->target >= NVISA_GM107_CHIPSET) { + /* On GM107+, the number of output patch components has moved in the TCP + * header, but it seems like blob still also uses the old position. + * Also, the high 8-bits are located inbetween the min/max parallel + * field and has to be set after updating the outputs. */ + tcp->hdr[3] = (opcs & 0x0f) << 28; + tcp->hdr[4] |= (opcs & 0xf0) << 16; + } + nvc0_tp_get_tess_mode(tcp, info); return 0; |