Merge branch '7.8'

8 files changed, 60 insertions, 56 deletions

diff --git a/src/gallium/auxiliary/os/os_time.h b/src/gallium/auxiliary/os/os_time.h
index 5b55c1b3747..7e0f67a76b0 100644
--- a/src/gallium/auxiliary/os/os_time.h
+++ b/src/gallium/auxiliary/os/os_time.h
@@ -71,7 +71,7 @@ os_time_sleep(int64_t usecs);
 /*
  * Helper function for detecting time outs, taking in account overflow.
  *
- * Returns true the the current time has elapsed beyond the specified interval.
+ * Returns true if the current time has elapsed beyond the specified interval.
  */
 static INLINE boolean
 os_time_timeout(int64_t start,
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
index 576d514741d..c54576b3c32 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
@@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f,
     */
    ASSERT(fbS_reg != newS_reg);
 
-   /* The code also assumes the the stencil_max_value is of the form 
+   /* The code also assumes that the stencil_max_value is of the form
     * 2^n-1 and can therefore be used as a mask for the valid bits in 
     * addition to a maximum.  Make sure this is the case as well.
     * The clever math below exploits the fact that incrementing a 
diff --git a/src/gallium/drivers/cell/ppu/cell_spu.c b/src/gallium/drivers/cell/ppu/cell_spu.c
index 28e5e6d706d..39284f3a5d1 100644
--- a/src/gallium/drivers/cell/ppu/cell_spu.c
+++ b/src/gallium/drivers/cell/ppu/cell_spu.c
@@ -135,7 +135,7 @@ cell_thread_function(void *arg)
 
 /**
  * Create the SPU threads.  This is done once during driver initialization.
- * This involves setting the the "init" message which is sent to each SPU.
+ * This involves setting the "init" message which is sent to each SPU.
  * The init message specifies an SPU id, total number of SPUs, location
  * and number of batch buffers, etc.
  */
diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index b289eef0fc2..c93c5d127c4 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -742,7 +742,7 @@ nv40_vertprog_translate(struct nv40_context *nv40,
 	}
 
 	/* Redirect post-transform vertex position to a temp if user clip
-	 * planes are enabled.  We need to append code the the vtxprog
+	 * planes are enabled.  We need to append code to the vtxprog
 	 * to handle clip planes later.
 	 */
 	if (vp->ucp.nr)  {
diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h
index a249e8b36be..c67cc868713 100644
--- a/src/gallium/drivers/r300/r300_reg.h
+++ b/src/gallium/drivers/r300/r300_reg.h
@@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_PVS_FIRST_INST(x)            ((x) << 0)
 #       define R300_PVS_XYZW_VALID_INST(x)       ((x) << 10)
 #       define R300_PVS_LAST_INST(x)             ((x) << 20)
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
 #define R300_VAP_PVS_CONST_CNTL             0x22D4
 #       define R300_PVS_CONST_BASE_OFFSET_SHIFT  0
 #       define R300_PVS_MAX_CONST_ADDR_SHIFT     16
@@ -1857,7 +1857,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * The destination register index is in FPI1 (color) and FPI3 (alpha)
  * together with enable bits.
  * There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
+ * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
  * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
  * same index must be used for both).
  *
diff --git a/src/gallium/state_trackers/dri/dri_screen.c b/src/gallium/state_trackers/dri/dri_screen.c
index 60bc560049c..7ccad8f5dd6 100644
--- a/src/gallium/state_trackers/dri/dri_screen.c
+++ b/src/gallium/state_trackers/dri/dri_screen.c
@@ -90,6 +90,9 @@ dri_fill_in_modes(struct dri_screen *screen,
 		  unsigned pixel_bits)
 {
    __DRIconfig **configs = NULL;
+   __DRIconfig **configs_r5g6b5 = NULL;
+   __DRIconfig **configs_a8r8g8b8 = NULL;
+   __DRIconfig **configs_x8r8g8b8 = NULL;
    unsigned num_modes;
    uint8_t depth_bits_array[5];
    uint8_t stencil_bits_array[5];
@@ -127,25 +130,23 @@ dri_fill_in_modes(struct dri_screen *screen,
    pf_x8r8g8b8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B8G8R8X8_UNORM,
 					       PIPE_TEXTURE_2D,
 					       PIPE_TEXTURE_USAGE_RENDER_TARGET, 0);
-
-   /* we support buffers with different depths only if we can tell the driver
-    * the actual depth of each of them. */
-   if (screen->sPriv->dri2.loader
-       && (screen->sPriv->dri2.loader->base.version > 2)
-       && (screen->sPriv->dri2.loader->getBuffersWithFormat != NULL)) {
+   pf_r5g6b5 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B5G6R5_UNORM,
+					     PIPE_TEXTURE_2D,
+					     PIPE_TEXTURE_USAGE_RENDER_TARGET, 0);
+
+   /* We can only get a 16 or 32 bit depth buffer with getBuffersWithFormat */
+   if (screen->sPriv->dri2.loader &&
+       (screen->sPriv->dri2.loader->base.version > 2) &&
+       (screen->sPriv->dri2.loader->getBuffersWithFormat != NULL)) {
       pf_z16 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z16_UNORM,
                                              PIPE_TEXTURE_2D,
                                              PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0);
       pf_z32 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z32_UNORM,
                                              PIPE_TEXTURE_2D,
                                              PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0);
-      pf_r5g6b5 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B5G6R5_UNORM,
-                                                PIPE_TEXTURE_2D,
-                                                PIPE_TEXTURE_USAGE_RENDER_TARGET, 0);
    } else {
       pf_z16 = FALSE;
       pf_z32 = FALSE;
-      pf_r5g6b5 = FALSE;
    }
 
    if (pf_z16) {
@@ -175,46 +176,48 @@ dri_fill_in_modes(struct dri_screen *screen,
    num_modes =
       depth_buffer_factor * back_buffer_factor * msaa_samples_factor * 4;
 
-   if (pixel_bits == 16 && pf_r5g6b5) {
-      configs = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5,
-				 depth_bits_array, stencil_bits_array,
-				 depth_buffer_factor, back_buffer_modes,
-				 back_buffer_factor,
-				 msaa_samples_array, msaa_samples_factor,
-				 GL_TRUE);
+   if (pf_r5g6b5)
+      configs_r5g6b5 = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5,
+                                        depth_bits_array, stencil_bits_array,
+                                        depth_buffer_factor, back_buffer_modes,
+                                        back_buffer_factor,
+                                        msaa_samples_array, msaa_samples_factor,
+                                        GL_TRUE);
+
+   if (pf_a8r8g8b8)
+      configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,
+                                          depth_bits_array,
+                                          stencil_bits_array,
+                                          depth_buffer_factor,
+                                          back_buffer_modes,
+                                          back_buffer_factor,
+                                          msaa_samples_array,
+                                          msaa_samples_factor,
+                                          GL_TRUE);
+
+   if (pf_x8r8g8b8)
+      configs_x8r8g8b8 = driCreateConfigs(GL_BGR, GL_UNSIGNED_INT_8_8_8_8_REV,
+                                          depth_bits_array,
+                                          stencil_bits_array,
+                                          depth_buffer_factor,
+                                          back_buffer_modes,
+                                          back_buffer_factor,
+                                          msaa_samples_array,
+                                          msaa_samples_factor,
+                                          GL_TRUE);
+
+   if (pixel_bits == 16) {
+      configs = configs_r5g6b5;
+      if (configs_a8r8g8b8)
+         configs = configs ? driConcatConfigs(configs, configs_a8r8g8b8) : configs_a8r8g8b8;
+      if (configs_x8r8g8b8)
+	 configs = configs ? driConcatConfigs(configs, configs_x8r8g8b8) : configs_x8r8g8b8;
    } else {
-      __DRIconfig **configs_a8r8g8b8 = NULL;
-      __DRIconfig **configs_x8r8g8b8 = NULL;
-
-      if (pf_a8r8g8b8)
-	 configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,
-					     depth_bits_array,
-					     stencil_bits_array,
-					     depth_buffer_factor,
-					     back_buffer_modes,
-					     back_buffer_factor,
-					     msaa_samples_array,
-                                             msaa_samples_factor,
-					     GL_TRUE);
-      if (pf_x8r8g8b8)
-	 configs_x8r8g8b8 = driCreateConfigs(GL_BGR, GL_UNSIGNED_INT_8_8_8_8_REV,
-					     depth_bits_array,
-					     stencil_bits_array,
-					     depth_buffer_factor,
-					     back_buffer_modes,
-					     back_buffer_factor,
-					     msaa_samples_array,
-                                             msaa_samples_factor,
-					     GL_TRUE);
-
-      if (configs_a8r8g8b8 && configs_x8r8g8b8)
-	 configs = driConcatConfigs(configs_x8r8g8b8, configs_a8r8g8b8);
-      else if (configs_a8r8g8b8)
-	 configs = configs_a8r8g8b8;
-      else if (configs_x8r8g8b8)
-	 configs = configs_x8r8g8b8;
-      else
-	 configs = NULL;
+      configs = configs_a8r8g8b8;
+      if (configs_x8r8g8b8)
+	 configs = configs ? driConcatConfigs(configs, configs_x8r8g8b8) : configs_x8r8g8b8;
+      if (configs_r5g6b5)
+         configs = configs ? driConcatConfigs(configs, configs_r5g6b5) : configs_r5g6b5;
    }
 
    if (configs == NULL) {
diff --git a/src/gallium/state_trackers/wgl/stw_framebuffer.h b/src/gallium/state_trackers/wgl/stw_framebuffer.h
index 08cc4973bce..e61e9bf9c26 100644
--- a/src/gallium/state_trackers/wgl/stw_framebuffer.h
+++ b/src/gallium/state_trackers/wgl/stw_framebuffer.h
@@ -45,7 +45,7 @@ struct stw_framebuffer
    /**
     * This mutex has two purposes:
     * - protect the access to the mutable data members below
-    * - prevent the the framebuffer from being deleted while being accessed.
+    * - prevent the framebuffer from being deleted while being accessed.
     * 
     * It is OK to lock this mutex while holding the stw_device::fb_mutex lock, 
     * but the opposite must never happen.
diff --git a/src/gallium/winsys/drm/vmware/dri/SConscript b/src/gallium/winsys/drm/vmware/dri/SConscript
index 84319f91ff1..d26d0cd7483 100644
--- a/src/gallium/winsys/drm/vmware/dri/SConscript
+++ b/src/gallium/winsys/drm/vmware/dri/SConscript
@@ -48,6 +48,7 @@ if env['platform'] == 'linux':
             svgadrm,
             svga,
             mesa,
+            glsl,
             gallium,
             ])