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authorMarek Olšák <[email protected]>2017-03-28 03:38:47 +0200
committerMarek Olšák <[email protected]>2017-03-31 21:41:57 +0200
commit744317c9d2973cebe64ca91899815d6c1515b7f5 (patch)
tree1c9d96a57eda7dc43e79beb8bf2ad8d448e2e77b /src/gallium
parentea595214756cdc366c4c5a27316efa00556ac4ff (diff)
radeonsi/gfx9: allow CMASK fast clear with RB+
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index d811a77ca86..8110ec1484c 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2691,13 +2691,13 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
!(rctx->screen->debug_flags & DBG_NO_DCC_FB)) {
vi_separate_dcc_try_enable(rctx, tex);
- /* RB+ isn't supported with a CMASK-based clear, so all
- * clears are considered to be hypothetically slow
+ /* RB+ isn't supported with a CMASK clear only on Stoney,
+ * so all clears are considered to be hypothetically slow
* clears, which is weighed when determining whether to
* enable separate DCC.
*/
if (tex->dcc_gather_statistics &&
- rctx->screen->rbplus_allowed)
+ rctx->family == CHIP_STONEY)
tex->num_slow_clears++;
}
@@ -2729,8 +2729,8 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
continue;
}
- /* RB+ doesn't work with CMASK fast clear. */
- if (rctx->screen->rbplus_allowed)
+ /* RB+ doesn't work with CMASK fast clear on Stoney. */
+ if (rctx->family == CHIP_STONEY)
continue;
/* ensure CMASK is enabled */