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authorMarek Olšák <[email protected]>2017-05-27 17:52:31 +0200
committerMarek Olšák <[email protected]>2017-06-07 18:43:42 +0200
commit6e2c07749bff974e96234a1b75c15f6f4a3c82f9 (patch)
tree446a8bb539488471ffc0d60920fa335a50908446 /src/gallium
parent294be5279df40c049f57d7d6a704d5fb28d5579a (diff)
radeonsi: move streamout state update out of si_update_shaders
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c40
2 files changed, 25 insertions, 16 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index aab902b4c79..71126219ceb 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -336,6 +336,7 @@ struct si_shader_selector {
unsigned max_gs_stream; /* count - 1 */
unsigned gsvs_vertex_size;
unsigned max_gsvs_emit_size;
+ unsigned enabled_streamout_buffer_mask;
/* PS parameters. */
unsigned color_attr_index[2];
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 55e881ca529..5cbb91b819e 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1956,6 +1956,13 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
&sel->active_const_and_shader_buffers,
&sel->active_samplers_and_images);
+ /* Record which streamout buffers are enabled. */
+ for (i = 0; i < sel->so.num_outputs; i++) {
+ sel->enabled_streamout_buffer_mask |=
+ (1 << sel->so.output[i].output_buffer) <<
+ (sel->so.output[i].stream * 4);
+ }
+
/* The prolog is a no-op if there are no inputs. */
sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
sel->info.num_inputs;
@@ -2137,6 +2144,20 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
return sel;
}
+static void si_update_streamout_state(struct si_context *sctx)
+{
+ struct si_shader_selector *shader_with_so =
+ sctx->gs_shader.cso ? sctx->gs_shader.cso :
+ sctx->tes_shader.cso ? sctx->tes_shader.cso :
+ sctx->vs_shader.cso;
+ if (!shader_with_so)
+ return;
+
+ sctx->b.streamout.enabled_stream_buffers_mask =
+ shader_with_so->enabled_streamout_buffer_mask;
+ sctx->b.streamout.stride_in_dw = shader_with_so->so.stride;
+}
+
static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
{
struct si_context *sctx = (struct si_context *)ctx;
@@ -2151,6 +2172,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->clip_regs);
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
si_set_active_descriptors_for_shader(sctx, sel);
+ si_update_streamout_state(sctx);
}
static void si_update_tess_uses_prim_id(struct si_context *sctx)
@@ -2189,6 +2211,7 @@ static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
}
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
si_set_active_descriptors_for_shader(sctx, sel);
+ si_update_streamout_state(sctx);
}
static void si_bind_tcs_shader(struct pipe_context *ctx, void *state)
@@ -2234,6 +2257,7 @@ static void si_bind_tes_shader(struct pipe_context *ctx, void *state)
}
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
si_set_active_descriptors_for_shader(sctx, sel);
+ si_update_streamout_state(sctx);
}
static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
@@ -2991,18 +3015,6 @@ static void si_update_vgt_shader_config(struct si_context *sctx)
si_pm4_bind_state(sctx, vgt_shader_config, *pm4);
}
-static void si_update_so(struct si_context *sctx, struct si_shader_selector *shader)
-{
- struct pipe_stream_output_info *so = &shader->so;
- uint32_t enabled_stream_buffers_mask = 0;
- int i;
-
- for (i = 0; i < so->num_outputs; i++)
- enabled_stream_buffers_mask |= (1 << so->output[i].output_buffer) << (so->output[i].stream * 4);
- sctx->b.streamout.enabled_stream_buffers_mask = enabled_stream_buffers_mask;
- sctx->b.streamout.stride_in_dw = shader->so.stride;
-}
-
bool si_update_shaders(struct si_context *sctx)
{
struct pipe_context *ctx = (struct pipe_context*)sctx;
@@ -3070,7 +3082,6 @@ bool si_update_shaders(struct si_context *sctx)
if (r)
return false;
si_pm4_bind_state(sctx, vs, sctx->tes_shader.current->pm4);
- si_update_so(sctx, sctx->tes_shader.cso);
}
} else if (sctx->gs_shader.cso) {
if (sctx->b.chip_class <= VI) {
@@ -3090,8 +3101,6 @@ bool si_update_shaders(struct si_context *sctx)
if (r)
return false;
si_pm4_bind_state(sctx, vs, sctx->vs_shader.current->pm4);
- si_update_so(sctx, sctx->vs_shader.cso);
-
si_pm4_bind_state(sctx, ls, NULL);
si_pm4_bind_state(sctx, hs, NULL);
}
@@ -3103,7 +3112,6 @@ bool si_update_shaders(struct si_context *sctx)
return false;
si_pm4_bind_state(sctx, gs, sctx->gs_shader.current->pm4);
si_pm4_bind_state(sctx, vs, sctx->gs_shader.cso->gs_copy_shader->pm4);
- si_update_so(sctx, sctx->gs_shader.cso);
if (!si_update_gs_ring_buffers(sctx))
return false;