diff options
| author | Rob Clark <[email protected]> | 2016-03-09 04:07:51 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2016-03-13 12:23:41 -0400 |
| commit | 01b071d5305d866a56c962fe76cd865badb6060f (patch) | |
| tree | 3a3ad226b113bb9ab765da4d465f372140026ed0 /src/gallium | |
| parent | f68c6951b86ac38ebdb89bc6b5a6285433e684a6 (diff) | |
freedreno: OUT_RELOC vs OUT_RELOCW fixes
Make sure we use OUT_RELOCW() in cases where the buffer is written to.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_gmem.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_query.c | 6 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c index c490f80f06d..815a310df83 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c @@ -1014,8 +1014,8 @@ fd3_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile) OUT_PKT3(ring, CP_SET_BIN_DATA, 2); - OUT_RELOC(ring, pipe->bo, 0, 0, 0); /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */ - OUT_RELOC(ring, fd3_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */ + OUT_RELOCW(ring, pipe->bo, 0, 0, 0); /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */ + OUT_RELOCW(ring, fd3_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */ (tile->p * 4), 0, 0); } else { OUT_PKT0(ring, REG_A3XX_PC_VSTREAM_CONTROL, 1); diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c index ed2307d0964..0629c303656 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c @@ -773,8 +773,8 @@ fd4_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile) A4XX_PC_VSTREAM_CONTROL_N(tile->n)); OUT_PKT3(ring, CP_SET_BIN_DATA, 2); - OUT_RELOC(ring, pipe->bo, 0, 0, 0); /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */ - OUT_RELOC(ring, fd4_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */ + OUT_RELOCW(ring, pipe->bo, 0, 0, 0); /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */ + OUT_RELOCW(ring, fd4_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */ (tile->p * 4), 0, 0); } else { OUT_PKT0(ring, REG_A4XX_PC_VSTREAM_CONTROL, 1); diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_query.c b/src/gallium/drivers/freedreno/a4xx/fd4_query.c index 14a809431ac..77e203f6c56 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_query.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_query.c @@ -173,7 +173,7 @@ time_elapsed_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) OUT_RING(ring, CP_REG_TO_MEM_0_REG(REG_A4XX_RBBM_PERFCTR_CP_0_LO) | CP_REG_TO_MEM_0_64B | CP_REG_TO_MEM_0_CNT(2-1)); /* write 2 regs to mem */ - OUT_RELOC(ring, scratch_bo, sample_off, 0, 0); + OUT_RELOCW(ring, scratch_bo, sample_off, 0, 0); /* ok... here we really *would* like to use the CP_SET_CONSTANT * mode which can add a constant to value in reg2 and write to @@ -187,7 +187,7 @@ time_elapsed_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) /* per-sample offset to scratch bo: */ OUT_PKT3(ring, CP_MEM_WRITE, 2); - OUT_RELOC(ring, scratch_bo, addr_off, 0, 0); + OUT_RELOCW(ring, scratch_bo, addr_off, 0, 0); OUT_RING(ring, samp->offset); /* now add to that the per-tile base: */ @@ -195,7 +195,7 @@ time_elapsed_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) OUT_RING(ring, CP_REG_TO_MEM_0_REG(HW_QUERY_BASE_REG) | CP_REG_TO_MEM_0_ACCUMULATE | CP_REG_TO_MEM_0_CNT(1-1)); /* readback 1 regs */ - OUT_RELOC(ring, scratch_bo, addr_off, 0, 0); + OUT_RELOCW(ring, scratch_bo, addr_off, 0, 0); /* now copy that back to CP_ME_NRT_ADDR: */ OUT_PKT3(ring, CP_MEM_TO_REG, 2); |