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authorIlia Mirkin <[email protected]>2014-11-28 14:10:36 -0500
committerIlia Mirkin <[email protected]>2014-11-30 13:00:41 -0500
commitd63afe3b588096ca6b91db8d1d8807968b63b390 (patch)
tree365719e0db8132855584fd6d8f1d0dacc1acbeba /src/gallium
parent5d95e99622332fd1cb7f2bf77bee3fdf0e0848b9 (diff)
freedreno/a3xx: add format to emit info, use to set sint/uint flags
Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_draw.c4
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.h1
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_program.c4
3 files changed, 7 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index b824d212a36..fe53c8ece7a 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -114,6 +114,7 @@ static void
fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
{
struct fd3_context *fd3_ctx = fd3_context(ctx);
+ struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
struct fd3_emit emit = {
.vtx = &ctx->vtx,
.prog = &ctx->prog,
@@ -122,7 +123,7 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
/* do binning pass first: */
.binning_pass = true,
.color_two_side = ctx->rasterizer ? ctx->rasterizer->light_twoside : false,
- .alpha = util_format_is_alpha(pipe_surface_format(ctx->framebuffer.cbufs[0])),
+ .alpha = util_format_is_alpha(pipe_surface_format(pfb->cbufs[0])),
// TODO set .half_precision based on render target format,
// ie. float16 and smaller use half, float32 use full..
.half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF),
@@ -134,6 +135,7 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
.fsaturate_t = fd3_ctx->fsaturate_t,
.fsaturate_r = fd3_ctx->fsaturate_r,
},
+ .format = pipe_surface_format(pfb->cbufs[0]),
.rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
};
unsigned dirty;
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
index c1bd61ae0a8..3aa77b6b12b 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
@@ -53,6 +53,7 @@ struct fd3_emit {
const struct fd_program_stateobj *prog;
const struct pipe_draw_info *info;
struct ir3_shader_key key;
+ enum pipe_format format;
uint32_t dirty;
bool rasterflat;
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index b6710957458..db729434974 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -351,7 +351,9 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit)
OUT_PKT0(ring, REG_A3XX_SP_FS_MRT_REG(0), 4);
OUT_RING(ring, A3XX_SP_FS_MRT_REG_REGID(color_regid) |
- COND(fp->key.half_precision, A3XX_SP_FS_MRT_REG_HALF_PRECISION));
+ COND(fp->key.half_precision, A3XX_SP_FS_MRT_REG_HALF_PRECISION) |
+ COND(util_format_is_pure_uint(emit->format), A3XX_SP_FS_MRT_REG_UINT) |
+ COND(util_format_is_pure_sint(emit->format), A3XX_SP_FS_MRT_REG_SINT));
OUT_RING(ring, A3XX_SP_FS_MRT_REG_REGID(0));
OUT_RING(ring, A3XX_SP_FS_MRT_REG_REGID(0));
OUT_RING(ring, A3XX_SP_FS_MRT_REG_REGID(0));