radeonsi: use si_context instead of pipe_context in parameters pt1

Acked-by: Timothy Arceri <[email protected]>

11 files changed, 24 insertions, 32 deletions

diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 7f924615b75..a29b2014224 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -715,7 +715,7 @@ static void r600_update_occlusion_query_state(struct si_context *sctx,
 		perfect_enable = sctx->b.num_perfect_occlusion_queries != 0;
 
 		if (enable != old_enable || perfect_enable != old_perfect_enable) {
-			si_set_occlusion_query_state(&sctx->b.b, old_perfect_enable);
+			si_set_occlusion_query_state(sctx, old_perfect_enable);
 		}
 	}
 }
@@ -1661,7 +1661,7 @@ static void r600_query_hw_get_result_resource(struct si_context *sctx,
 			return;
 	}
 
-	si_save_qbo_state(&sctx->b.b, &saved_state);
+	si_save_qbo_state(sctx, &saved_state);
 
 	r600_get_hw_query_params(sctx, query, index >= 0 ? index : 0, &params);
 	consts.end_offset = params.end_offset - params.start_offset;
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 42d9f0db629..39579b2bb95 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -836,11 +836,11 @@ static void si_launch_grid(
 	si_decompress_textures(sctx, 1 << PIPE_SHADER_COMPUTE);
 
 	/* Add buffer sizes for memory checking in need_cs_space. */
-	si_context_add_resource_size(ctx, &program->shader.bo->b.b);
+	si_context_add_resource_size(sctx, &program->shader.bo->b.b);
 	/* TODO: add the scratch buffer */
 
 	if (info->indirect) {
-		si_context_add_resource_size(ctx, info->indirect);
+		si_context_add_resource_size(sctx, info->indirect);
 
 		/* Indirect buffers use TC L2 on GFX9, but not older hw. */
 		if (sctx->b.chip_class <= VI &&
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 7e08ca512c2..7e3d825aca4 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -166,9 +166,9 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
 
 	if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) {
 		/* Count memory usage in so that need_cs_space can take it into account. */
-		si_context_add_resource_size(&sctx->b.b, dst);
+		si_context_add_resource_size(sctx, dst);
 		if (src)
-			si_context_add_resource_size(&sctx->b.b, src);
+			si_context_add_resource_size(sctx, src);
 	}
 
 	if (!(user_flags & SI_CPDMA_SKIP_CHECK_CS_SPACE))
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 5a5e2d38a81..a8c6e2d38f2 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1393,13 +1393,12 @@ void si_get_shader_buffers(struct si_context *sctx,
 
 /* RING BUFFERS */
 
-void si_set_ring_buffer(struct pipe_context *ctx, uint slot,
+void si_set_ring_buffer(struct si_context *sctx, uint slot,
 			struct pipe_resource *buffer,
 			unsigned stride, unsigned num_records,
 			bool add_tid, bool swizzle,
 			unsigned element_size, unsigned index_stride, uint64_t offset)
 {
-	struct si_context *sctx = (struct si_context *)ctx;
 	struct si_buffer_resources *buffers = &sctx->rw_buffers;
 	struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS];
 
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index de6d0f66c56..b54a2db2307 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -264,8 +264,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
 
 	si_mark_atom_dirty(ctx, &ctx->scratch_state);
 	if (ctx->scratch_buffer) {
-		si_context_add_resource_size(&ctx->b.b,
-					     &ctx->scratch_buffer->b.b);
+		si_context_add_resource_size(ctx, &ctx->scratch_buffer->b.b);
 	}
 
 	if (ctx->streamout.suspended) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index f5d81b8835f..f0dc8a03bde 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -781,9 +781,8 @@ void si_init_viewport_functions(struct si_context *ctx);
  */
 
 static inline void
-si_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r)
+si_context_add_resource_size(struct si_context *sctx, struct pipe_resource *r)
 {
-	struct si_context *sctx = (struct si_context *)ctx;
 	struct r600_resource *res = (struct r600_resource *)r;
 
 	if (res) {
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 4bbf450acb1..20a8adc3b90 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1348,11 +1348,9 @@ static void si_set_active_query_state(struct pipe_context *ctx, boolean enable)
 	}
 }
 
-void si_set_occlusion_query_state(struct pipe_context *ctx,
+void si_set_occlusion_query_state(struct si_context *sctx,
 				  bool old_perfect_enable)
 {
-	struct si_context *sctx = (struct si_context*)ctx;
-
 	si_mark_atom_dirty(sctx, &sctx->db_render_state);
 
 	bool perfect_enable = sctx->b.num_perfect_occlusion_queries != 0;
@@ -1361,10 +1359,8 @@ void si_set_occlusion_query_state(struct pipe_context *ctx,
 		si_mark_atom_dirty(sctx, &sctx->msaa_config);
 }
 
-void si_save_qbo_state(struct pipe_context *ctx, struct r600_qbo_state *st)
+void si_save_qbo_state(struct si_context *sctx, struct r600_qbo_state *st)
 {
-	struct si_context *sctx = (struct si_context*)ctx;
-
 	st->saved_compute = sctx->cs_shader_state.program;
 
 	si_get_pipe_constant_buffer(sctx, PIPE_SHADER_COMPUTE, 0, &st->saved_const0);
@@ -2872,7 +2868,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
 		if (vi_dcc_enabled(rtex, surf->base.u.tex.level))
 			sctx->framebuffer.CB_has_shader_readable_metadata = true;
 
-		si_context_add_resource_size(ctx, surf->base.texture);
+		si_context_add_resource_size(sctx, surf->base.texture);
 
 		p_atomic_inc(&rtex->framebuffers_bound);
 
@@ -2896,7 +2892,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
 		if (vi_tc_compat_htile_enabled(zstex, surf->base.u.tex.level))
 			sctx->framebuffer.DB_has_shader_readable_metadata = true;
 
-		si_context_add_resource_size(ctx, surf->base.texture);
+		si_context_add_resource_size(sctx, surf->base.texture);
 	}
 
 	si_update_ps_colorbuf0_slot(sctx);
@@ -4411,7 +4407,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
 			pipe_resource_reference(&dsti->buffer.resource, buf);
 			dsti->buffer_offset = src->buffer_offset;
 			dsti->stride = src->stride;
-			si_context_add_resource_size(ctx, buf);
+			si_context_add_resource_size(sctx, buf);
 			if (buf)
 				r600_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER;
 		}
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index e399b6b76af..c4ba2767d0d 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -338,7 +338,7 @@ void si_get_shader_buffers(struct si_context *sctx,
 			   enum pipe_shader_type shader,
 			   uint start_slot, uint count,
 			   struct pipe_shader_buffer *sbuf);
-void si_set_ring_buffer(struct pipe_context *ctx, uint slot,
+void si_set_ring_buffer(struct si_context *sctx, uint slot,
 			struct pipe_resource *buffer,
 			unsigned stride, unsigned num_records,
 			bool add_tid, bool swizzle,
@@ -405,8 +405,8 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
 			      unsigned force_level);
 void si_update_fb_dirtiness_after_rendering(struct si_context *sctx);
 void si_update_ps_iter_samples(struct si_context *sctx);
-void si_save_qbo_state(struct pipe_context *ctx, struct r600_qbo_state *st);
-void si_set_occlusion_query_state(struct pipe_context *ctx,
+void si_save_qbo_state(struct si_context *sctx, struct r600_qbo_state *st);
+void si_set_occlusion_query_state(struct si_context *sctx,
 				  bool old_perfect_enable);
 
 /* si_state_binning.c */
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 08aa00cb649..d8261f106d7 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1388,7 +1388,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 		struct pipe_draw_indirect_info *indirect = info->indirect;
 
 		/* Add the buffer size for memory checking in need_cs_space. */
-		si_context_add_resource_size(ctx, indirect->buffer);
+		si_context_add_resource_size(sctx, indirect->buffer);
 
 		/* Indirect buffers use TC L2 on GFX9, but not older hw. */
 		if (sctx->b.chip_class <= VI) {
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index c00ef2a0f2a..6043de2c6e8 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2781,15 +2781,15 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
 	/* Set ring bindings. */
 	if (sctx->esgs_ring) {
 		assert(sctx->b.chip_class <= VI);
-		si_set_ring_buffer(&sctx->b.b, SI_ES_RING_ESGS,
+		si_set_ring_buffer(sctx, SI_ES_RING_ESGS,
 				   sctx->esgs_ring, 0, sctx->esgs_ring->width0,
 				   true, true, 4, 64, 0);
-		si_set_ring_buffer(&sctx->b.b, SI_GS_RING_ESGS,
+		si_set_ring_buffer(sctx, SI_GS_RING_ESGS,
 				   sctx->esgs_ring, 0, sctx->esgs_ring->width0,
 				   false, false, 0, 0, 0);
 	}
 	if (sctx->gsvs_ring) {
-		si_set_ring_buffer(&sctx->b.b, SI_RING_GSVS,
+		si_set_ring_buffer(sctx, SI_RING_GSVS,
 				   sctx->gsvs_ring, 0, sctx->gsvs_ring->width0,
 				   false, false, 0, 0, 0);
 	}
@@ -2983,7 +2983,7 @@ static bool si_update_spi_tmpring_size(struct si_context *sctx)
 				return false;
 
 			si_mark_atom_dirty(sctx, &sctx->scratch_state);
-			si_context_add_resource_size(&sctx->b.b,
+			si_context_add_resource_size(sctx,
 						     &sctx->scratch_buffer->b.b);
 		}
 
@@ -3348,7 +3348,6 @@ static void si_emit_scratch_state(struct si_context *sctx,
 void *si_get_blit_vs(struct si_context *sctx, enum blitter_attrib_type type,
 		     unsigned num_layers)
 {
-	struct pipe_context *pipe = &sctx->b.b;
 	unsigned vs_blit_property;
 	void **vs;
 
@@ -3406,7 +3405,7 @@ void *si_get_blit_vs(struct si_context *sctx, enum blitter_attrib_type type,
 	}
 	ureg_END(ureg);
 
-	*vs = ureg_create_shader_and_destroy(ureg, pipe);
+	*vs = ureg_create_shader_and_destroy(ureg, &sctx->b.b);
 	return *vs;
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 59b7d95bd2d..21a5c88c512 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -153,7 +153,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
 		if (!targets[i])
 			continue;
 
-		si_context_add_resource_size(ctx, targets[i]->buffer);
+		si_context_add_resource_size(sctx, targets[i]->buffer);
 		enabled_mask |= 1 << i;
 
 		if (offsets[i] == ((unsigned)-1))