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authorEric Anholt <[email protected]>2014-07-31 11:23:22 -0700
committerEric Anholt <[email protected]>2014-08-11 14:45:30 -0700
commit9c631f30c9703b7c49acca5a2b3c75eb538015a1 (patch)
treeba7d93ee05a4c30c3b63a43d25db6a9178c529fc /src/gallium
parent100e5679c7cfcabc9c149e63e5e833c55ea81cb0 (diff)
vc4: Move the rest of RCL setup to flush time.
We only want to set up render target config and clear colors once per frame.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/vc4/vc4_context.c33
-rw-r--r--src/gallium/drivers/vc4/vc4_draw.c30
2 files changed, 30 insertions, 33 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c
index 9f10473846d..e9cba69686e 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -85,7 +85,7 @@ dump_fbo(struct vc4_context *vc4, struct vc4_bo *fbo)
}
static void
-vc4_rcl_tile_calls(struct vc4_context *vc4)
+vc4_setup_rcl(struct vc4_context *vc4)
{
struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]);
struct vc4_resource *ctex = vc4_resource(csurf->base.texture);
@@ -94,6 +94,33 @@ vc4_rcl_tile_calls(struct vc4_context *vc4)
uint32_t xtiles = align(width, 64) / 64;
uint32_t ytiles = align(height, 64) / 64;
+ cl_u8(&vc4->rcl, VC4_PACKET_CLEAR_COLORS);
+ cl_u32(&vc4->rcl, 0xff000000); // Opaque Black
+ cl_u32(&vc4->rcl, 0xff000000); // 32 bit clear colours need to be repeated twice
+ cl_u32(&vc4->rcl, 0);
+ cl_u8(&vc4->rcl, 0);
+
+ cl_start_reloc(&vc4->rcl, 1);
+ cl_u8(&vc4->rcl, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
+ cl_reloc(vc4, &vc4->rcl, ctex->bo, csurf->offset);
+ cl_u16(&vc4->rcl, width);
+ cl_u16(&vc4->rcl, height);
+ cl_u8(&vc4->rcl, (VC4_RENDER_CONFIG_MEMORY_FORMAT_LINEAR |
+ VC4_RENDER_CONFIG_FORMAT_RGBA8888));
+ cl_u8(&vc4->rcl, 0);
+
+ // Do a store of the first tile to force the tile buffer to be cleared
+ /* XXX: I think these two packets may be unnecessary. */
+ if (0) {
+ cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES);
+ cl_u8(&vc4->rcl, 0);
+ cl_u8(&vc4->rcl, 0);
+
+ cl_u8(&vc4->rcl, VC4_PACKET_STORE_TILE_BUFFER_GENERAL);
+ cl_u16(&vc4->rcl, 0); // Store nothing (just clear)
+ cl_u32(&vc4->rcl, 0); // no address is needed
+ }
+
for (int x = 0; x < xtiles; x++) {
for (int y = 0; y < ytiles; y++) {
cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES);
@@ -137,13 +164,13 @@ vc4_flush(struct pipe_context *pctx)
cl_u8(&vc4->bcl, VC4_PACKET_NOP);
cl_u8(&vc4->bcl, VC4_PACKET_HALT);
+ vc4_setup_rcl(vc4);
+
struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]);
struct vc4_resource *ctex = vc4_resource(csurf->base.texture);
struct drm_vc4_submit_cl submit;
memset(&submit, 0, sizeof(submit));
- vc4_rcl_tile_calls(vc4);
-
submit.bo_handles = vc4->bo_handles.base;
submit.bo_handle_count = (vc4->bo_handles.next -
vc4->bo_handles.base) / 4;
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c
index 2867aac38d6..5abe263b09c 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -171,36 +171,6 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
vc4->shader_rec_count++;
- cl_u8(&vc4->rcl, VC4_PACKET_CLEAR_COLORS);
- cl_u32(&vc4->rcl, 0xff000000); // Opaque Black
- cl_u32(&vc4->rcl, 0xff000000); // 32 bit clear colours need to be repeated twice
- cl_u32(&vc4->rcl, 0);
- cl_u8(&vc4->rcl, 0);
-
- struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]);
- struct vc4_resource *ctex = vc4_resource(csurf->base.texture);
-
- cl_start_reloc(&vc4->rcl, 1);
- cl_u8(&vc4->rcl, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
- cl_reloc(vc4, &vc4->rcl, ctex->bo, csurf->offset);
- cl_u16(&vc4->rcl, width);
- cl_u16(&vc4->rcl, height);
- cl_u8(&vc4->rcl, (VC4_RENDER_CONFIG_MEMORY_FORMAT_LINEAR |
- VC4_RENDER_CONFIG_FORMAT_RGBA8888));
- cl_u8(&vc4->rcl, 0);
-
- // Do a store of the first tile to force the tile buffer to be cleared
- /* XXX: I think these two packets may be unnecessary. */
- if (0) {
- cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES);
- cl_u8(&vc4->rcl, 0);
- cl_u8(&vc4->rcl, 0);
-
- cl_u8(&vc4->rcl, VC4_PACKET_STORE_TILE_BUFFER_GENERAL);
- cl_u16(&vc4->rcl, 0); // Store nothing (just clear)
- cl_u32(&vc4->rcl, 0); // no address is needed
- }
-
vc4_flush(pctx);
}