diff options
author | Marek Olšák <[email protected]> | 2019-01-18 19:19:23 -0500 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2019-01-22 12:25:57 -0500 |
commit | 96610f625d0f8c942c30d5a15be175e3e6538cfa (patch) | |
tree | 5bd8a9508ccace94a0fe32672c5b513f1e550a4f /src/gallium | |
parent | 86e25ed5a3d587602dbaa61dd7f0b29aafb22e9e (diff) |
radeonsi: rename rscreen -> sscreen
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/radeon/radeon_uvd_enc.h | 2 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 10 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_compute.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_gpu_load.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 2 |
5 files changed, 11 insertions, 11 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.h b/src/gallium/drivers/radeon/radeon_uvd_enc.h index 63176d264c2..52e7ae3c0a9 100644 --- a/src/gallium/drivers/radeon/radeon_uvd_enc.h +++ b/src/gallium/drivers/radeon/radeon_uvd_enc.h @@ -464,6 +464,6 @@ struct radeon_uvd_encoder }; void radeon_uvd_enc_1_1_init(struct radeon_uvd_encoder *enc); -bool si_radeon_uvd_enc_supported(struct si_screen *rscreen); +bool si_radeon_uvd_enc_supported(struct si_screen *sscreen); #endif // _RADEON_UVD_ENC_H diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c index ddb219792ae..1f41b09472f 100644 --- a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c +++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c @@ -835,10 +835,10 @@ radeon_uvd_enc_slice_header_hevc(struct radeon_uvd_encoder *enc) static void radeon_uvd_enc_ctx(struct radeon_uvd_encoder *enc) { - struct si_screen *rscreen = (struct si_screen *) enc->screen; + struct si_screen *sscreen = (struct si_screen *) enc->screen; enc->enc_pic.ctx_buf.swizzle_mode = 0; - if (rscreen->info.chip_class < GFX9) { + if (sscreen->info.chip_class < GFX9) { enc->enc_pic.ctx_buf.rec_luma_pitch = (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); enc->enc_pic.ctx_buf.rec_chroma_pitch = @@ -950,7 +950,7 @@ radeon_uvd_enc_rc_per_pic(struct radeon_uvd_encoder *enc, static void radeon_uvd_enc_encode_params_hevc(struct radeon_uvd_encoder *enc) { - struct si_screen *rscreen = (struct si_screen *) enc->screen; + struct si_screen *sscreen = (struct si_screen *) enc->screen; switch (enc->enc_pic.picture_type) { case PIPE_H265_ENC_PICTURE_TYPE_I: case PIPE_H265_ENC_PICTURE_TYPE_IDR: @@ -970,7 +970,7 @@ radeon_uvd_enc_encode_params_hevc(struct radeon_uvd_encoder *enc) } enc->enc_pic.enc_params.allowed_max_bitstream_size = enc->bs_size; - if (rscreen->info.chip_class < GFX9) { + if (sscreen->info.chip_class < GFX9) { enc->enc_pic.enc_params.input_pic_luma_pitch = (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); enc->enc_pic.enc_params.input_pic_chroma_pitch = @@ -998,7 +998,7 @@ radeon_uvd_enc_encode_params_hevc(struct radeon_uvd_encoder *enc) RADEON_ENC_CS(enc->enc_pic.enc_params.pic_type); RADEON_ENC_CS(enc->enc_pic.enc_params.allowed_max_bitstream_size); - if (rscreen->info.chip_class < GFX9) { + if (sscreen->info.chip_class < GFX9) { RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->luma->u.legacy.level[0].offset); RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 1f003cd36f2..f5b11bfd298 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -32,9 +32,9 @@ #include "si_build_pm4.h" #include "si_compute.h" -#define COMPUTE_DBG(rscreen, fmt, args...) \ +#define COMPUTE_DBG(sscreen, fmt, args...) \ do { \ - if ((rscreen->debug_flags & DBG(COMPUTE))) fprintf(stderr, fmt, ##args); \ + if ((sscreen->debug_flags & DBG(COMPUTE))) fprintf(stderr, fmt, ##args); \ } while (0); struct dispatch_packet { diff --git a/src/gallium/drivers/radeonsi/si_gpu_load.c b/src/gallium/drivers/radeonsi/si_gpu_load.c index 8c457b30eaa..481438f37bb 100644 --- a/src/gallium/drivers/radeonsi/si_gpu_load.c +++ b/src/gallium/drivers/radeonsi/si_gpu_load.c @@ -213,8 +213,8 @@ static unsigned si_end_mmio_counter(struct si_screen *sscreen, } } -#define BUSY_INDEX(rscreen, field) (&rscreen->mmio_counters.named.field.busy - \ - rscreen->mmio_counters.array) +#define BUSY_INDEX(sscreen, field) (&sscreen->mmio_counters.named.field.busy - \ + sscreen->mmio_counters.array) static unsigned busy_index_from_type(struct si_screen *sscreen, unsigned type) diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index c169d4e443d..dd742688b4d 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -482,7 +482,7 @@ static bool si_texture_discard_dcc(struct si_screen *sscreen, * context 1 & 2 read garbage, because DCC is disabled, yet there are * compressed tiled * - * \param sctx the current context if you have one, or rscreen->aux_context + * \param sctx the current context if you have one, or sscreen->aux_context * if you don't. */ bool si_texture_disable_dcc(struct si_context *sctx, |