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authorMarek Olšák <[email protected]>2017-10-26 01:51:29 +0200
committerMarek Olšák <[email protected]>2017-11-06 19:09:12 +0100
commit3f58988b81965fc70fe8770b4d8912cf12f0a6f1 (patch)
tree5fb4218168a988e9e31b5d5854b149a80f9d9954 /src/gallium
parent24d6318d2492a93c707e9216cb897a2b0a1565c7 (diff)
radeonsi: enable signed vertex buffer offsets
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c25
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c2
2 files changed, 12 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 873a9cbfc2a..69371ea8910 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -995,7 +995,6 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
unsigned i, count;
unsigned desc_list_byte_size;
unsigned first_vb_use_mask;
- uint64_t va;
uint32_t *ptr;
if (!sctx->vertex_buffers_dirty || !velems)
@@ -1035,7 +1034,6 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
for (i = 0; i < count; i++) {
struct pipe_vertex_buffer *vb;
struct r600_resource *rbuffer;
- unsigned offset;
unsigned vbo_index = velems->vertex_buffer_index[i];
uint32_t *desc = &ptr[i*4];
@@ -1046,23 +1044,22 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
continue;
}
- offset = vb->buffer_offset + velems->src_offset[i];
- va = rbuffer->gpu_address + offset;
-
- /* Fill in T# buffer resource description */
- desc[0] = va;
- desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
- S_008F04_STRIDE(vb->stride);
+ int offset = (int)vb->buffer_offset + (int)velems->src_offset[i];
+ int64_t va = (int64_t)rbuffer->gpu_address + offset;
+ assert(va > 0);
+ int64_t num_records = (int64_t)rbuffer->b.b.width0 - offset;
if (sctx->b.chip_class != VI && vb->stride) {
/* Round up by rounding down and adding 1 */
- desc[2] = (vb->buffer.resource->width0 - offset -
- velems->format_size[i]) /
- vb->stride + 1;
- } else {
- desc[2] = vb->buffer.resource->width0 - offset;
+ num_records = (num_records - velems->format_size[i]) /
+ vb->stride + 1;
}
+ assert(num_records >= 0 && num_records <= UINT_MAX);
+ desc[0] = va;
+ desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
+ S_008F04_STRIDE(vb->stride);
+ desc[2] = num_records;
desc[3] = velems->rsrc_word3[i];
if (first_vb_use_mask & (1 << i)) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 8212e340a5c..d39e412de9a 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -507,6 +507,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
+ case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
return 1;
case PIPE_CAP_TGSI_VOTE:
@@ -590,7 +591,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
- case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
return 0;
case PIPE_CAP_NATIVE_FENCE_FD: