diff options
| author | Dave Airlie <[email protected]> | 2010-09-10 11:22:41 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2010-09-10 11:29:23 +1000 |
| commit | e795ca8f3175fa6fd97b6b2ef2775e3f8803012a (patch) | |
| tree | 75bd873a87672c530323103e370920b44e7d777b /src/gallium | |
| parent | 48fda8c446c127298e8a523a321d4da131c2834d (diff) | |
r600g: don't need 3 bos here.
the code should reloc correctly a single BO 3 times.
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/r600/r600_hw_states.c | 8 | ||||
| -rw-r--r-- | src/gallium/winsys/r600/drm/r600_states.h | 4 |
2 files changed, 4 insertions, 8 deletions
diff --git a/src/gallium/drivers/r600/r600_hw_states.c b/src/gallium/drivers/r600/r600_hw_states.c index 55723360bf6..4de3eae065f 100644 --- a/src/gallium/drivers/r600/r600_hw_states.c +++ b/src/gallium/drivers/r600/r600_hw_states.c @@ -120,12 +120,8 @@ static void r600_cb(struct r600_context *rctx, struct radeon_state *rstate, rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture; rbuffer = &rtex->resource; rstate->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); - rstate->bo[1] = radeon_bo_incref(rscreen->rw, rbuffer->bo); - rstate->bo[2] = radeon_bo_incref(rscreen->rw, rbuffer->bo); - rstate->placement[0] = RADEON_GEM_DOMAIN_GTT; - rstate->placement[2] = RADEON_GEM_DOMAIN_GTT; - rstate->placement[4] = RADEON_GEM_DOMAIN_GTT; - rstate->nbo = 3; + rstate->placement[0] = RADEON_GEM_DOMAIN_VRAM; + rstate->nbo = 1; pitch = (rtex->pitch[level] / rtex->bpt) / 8 - 1; slice = (rtex->pitch[level] / rtex->bpt) * state->cbufs[cb]->height / 64 - 1; diff --git a/src/gallium/winsys/r600/drm/r600_states.h b/src/gallium/winsys/r600/drm/r600_states.h index 06f6c7773d2..a0175fb603f 100644 --- a/src/gallium/winsys/r600/drm/r600_states.h +++ b/src/gallium/winsys/r600/drm/r600_states.h @@ -404,8 +404,8 @@ static const struct radeon_register R600_names_CB0[] = { {0x000280A0, 0, 0, "CB_COLOR0_INFO"}, {0x00028060, 0, 0, "CB_COLOR0_SIZE"}, {0x00028080, 0, 0, "CB_COLOR0_VIEW"}, - {0x000280E0, 1, 1, "CB_COLOR0_FRAG"}, - {0x000280C0, 1, 2, "CB_COLOR0_TILE"}, + {0x000280E0, 1, 0, "CB_COLOR0_FRAG"}, + {0x000280C0, 1, 0, "CB_COLOR0_TILE"}, {0x00028100, 0, 0, "CB_COLOR0_MASK"}, }; |