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authorMarek Olšák <[email protected]>2018-03-06 19:07:58 -0500
committerMarek Olšák <[email protected]>2018-03-08 14:58:16 -0500
commit75c5d25f0f34cd70246ee1b0b77a75ec82dfcecb (patch)
treed2446c8058e5350fa3aeb222ea7bbc9ad30ea361 /src/gallium
parent5b68a7297d2a610faeb7353c8e49910ea1b16d43 (diff)
radeonsi: align command buffer starting address to fix some Raven hangs
Cc: 17.3 18.0 <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_pm4.c5
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c5
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c1
3 files changed, 7 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index 96e4e1dd1a7..f4c41f5ffa5 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -167,8 +167,9 @@ void si_pm4_upload_indirect_buffer(struct si_context *sctx,
r600_resource_reference(&state->indirect_buffer, NULL);
state->indirect_buffer = (struct r600_resource*)
- pipe_buffer_create(screen, 0,
- PIPE_USAGE_DEFAULT, aligned_ndw * 4);
+ si_aligned_buffer_create(screen, 0,
+ PIPE_USAGE_DEFAULT, aligned_ndw * 4,
+ sctx->screen->info.ib_start_alignment);
if (!state->indirect_buffer)
return;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 92d5394b121..d9a95c05093 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -800,10 +800,11 @@ static void amdgpu_set_ib_size(struct amdgpu_ib *ib)
}
}
-static void amdgpu_ib_finalize(struct amdgpu_ib *ib)
+static void amdgpu_ib_finalize(struct amdgpu_winsys *ws, struct amdgpu_ib *ib)
{
amdgpu_set_ib_size(ib);
ib->used_ib_space += ib->base.current.cdw * 4;
+ ib->used_ib_space = align(ib->used_ib_space, ws->info.ib_start_alignment);
ib->max_ib_size = MAX2(ib->max_ib_size, ib->base.prev_dw + ib->base.current.cdw);
}
@@ -1561,7 +1562,7 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
struct amdgpu_cs_context *cur = cs->csc;
/* Set IB sizes. */
- amdgpu_ib_finalize(&cs->main);
+ amdgpu_ib_finalize(ws, &cs->main);
/* Create a fence. */
amdgpu_fence_reference(&cur->fence, NULL);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 85a186af978..036e9861f5f 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -527,6 +527,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
(ws->info.family == CHIP_HAWAII &&
ws->accel_working2 < 3);
ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */
+ ws->info.ib_start_alignment = 4096;
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;