summaryrefslogtreecommitdiffstats
path: root/src/gallium
diff options
context:
space:
mode:
authorTim Rowley <[email protected]>2017-11-07 15:24:25 -0600
committerTim Rowley <[email protected]>2017-11-20 13:50:56 -0600
commit44025def06a8b8d1c019f611079a003964ea7511 (patch)
tree236ec3fd02c35aadb71533e4dc32d09d491d5bc5 /src/gallium
parentbc356b0fc0839b19eadbd96018f23c486ff00e84 (diff)
swr/rast: Add alignment to transpose targets
Needed to ensure alignment for avx512. Fixes address sanitizer crash. Reviewed-by: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/binner.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/core/binner.cpp b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
index b624ae69b34..9d1f0d87994 100644
--- a/src/gallium/drivers/swr/rasterizer/core/binner.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
@@ -796,10 +796,10 @@ endBinTriangles:
// transpose verts needed for backend
/// @todo modify BE to take non-transformed verts
- simd4scalar vHorizX[SIMD_WIDTH];
- simd4scalar vHorizY[SIMD_WIDTH];
- simd4scalar vHorizZ[SIMD_WIDTH];
- simd4scalar vHorizW[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizX[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizY[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizZ[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizW[SIMD_WIDTH];
TransposeVertices(vHorizX, tri[0].x, tri[1].x, tri[2].x);
TransposeVertices(vHorizY, tri[0].y, tri[1].y, tri[2].y);
@@ -1510,10 +1510,10 @@ void BinPostSetupLinesImpl(
// transpose verts needed for backend
/// @todo modify BE to take non-transformed verts
- simd4scalar vHorizX[SIMD_WIDTH];
- simd4scalar vHorizY[SIMD_WIDTH];
- simd4scalar vHorizZ[SIMD_WIDTH];
- simd4scalar vHorizW[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizX[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizY[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizZ[SIMD_WIDTH];
+ OSALIGNSIMD16(simd4scalar) vHorizW[SIMD_WIDTH];
if (!primMask)
{