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authorMarek Olšák <[email protected]>2017-02-16 01:20:32 +0100
committerMarek Olšák <[email protected]>2017-02-18 01:22:08 +0100
commit2fb021b6205a393d82d5f3c2e15af624d79742f4 (patch)
tree09744f1011fafa0674891ba867a2e02ef44eadcf /src/gallium
parentdbd38f2a92633e565fe35c8d9c66f864d6ff4877 (diff)
radeonsi: remove the fix_size3 workaround
not needed with the shader fallback Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c22
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c9
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h5
3 files changed, 0 insertions, 36 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 3c981761dc5..59022ed2af5 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -954,7 +954,6 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
if (!sctx->vertex_buffers_dirty || !count || !velems)
return true;
- unsigned fix_size3 = velems->fix_size3;
unsigned first_vb_use_mask = velems->first_vb_use_mask;
/* Vertex buffer descriptors are the only ones which are uploaded
@@ -1003,28 +1002,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
velems->format_size[i]) /
vb->stride + 1;
} else {
- uint32_t size3;
-
desc[2] = vb->buffer->width0 - offset;
-
- /* For attributes of size 3 with byte or short
- * components, we use a 4-component data format.
- *
- * As a consequence, we have to round the buffer size
- * up so that the hardware sees four components as
- * being inside the buffer if and only if the first
- * three components are in the buffer.
- *
- * Since the offset and stride are guaranteed to be
- * 4-byte aligned, this alignment will never cross the
- * winsys buffer boundary.
- */
- size3 = (fix_size3 >> (2 * i)) & 3;
- if (vb->stride && size3) {
- assert(offset % 4 == 0 && vb->stride % 4 == 0);
- assert(size3 <= 2);
- desc[2] = align(desc[2], size3 * 2);
- }
}
desc[3] = velems->rsrc_word3[i];
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 024de8b035e..f53f8dd8ee9 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3481,15 +3481,6 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
S_008F0C_DST_SEL_W(si_map_swizzle(swizzle[3])) |
S_008F0C_NUM_FORMAT(num_format) |
S_008F0C_DATA_FORMAT(data_format);
-
- /* We work around the fact that 8_8_8 and 16_16_16 data formats
- * do not exist by using the corresponding 4-component formats.
- * This requires a fixup of the descriptor for bounds checks.
- */
- if (desc->block.bits == 3 * 8 ||
- desc->block.bits == 3 * 16) {
- v->fix_size3 |= (desc->block.bits / 24) << (2 * i);
- }
}
memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) * count);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index cd44ed1b227..f572d2f745c 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -103,12 +103,7 @@ struct si_vertex_element
/* Vertex buffer descriptor list size aligned for optimal prefetch. */
unsigned desc_list_byte_size;
- /* Two bits per attribute indicating the size of each vector component
- * in bytes if the size 3-workaround must be applied.
- */
- uint32_t fix_size3;
uint8_t fix_fetch[SI_MAX_ATTRIBS];
-
uint32_t rsrc_word3[SI_MAX_ATTRIBS];
uint32_t format_size[SI_MAX_ATTRIBS];
struct pipe_vertex_element elements[SI_MAX_ATTRIBS];