freedreno: pass number of instances to draw

Signed-off-by: Ilia Mirkin <[email protected]>

8 files changed, 22 insertions, 18 deletions

diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_draw.c b/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
index 44eab7a0075..dfc7202c446 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
@@ -264,7 +264,7 @@ fd2_clear(struct fd_context *ctx, unsigned buffers,
 	OUT_RING(ring, 0);                 /* VGT_MIN_VTX_INDX */
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 3, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 
 	OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 	OUT_RING(ring, CP_REG(REG_A2XX_A220_RB_LRZ_VSC_CONTROL));
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
index e0aae1c7865..8593c4afc0e 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
@@ -91,7 +91,7 @@ emit_gmem2mem_surf(struct fd_context *ctx, uint32_t base,
 	OUT_RING(ring, 0);                 /* VGT_MIN_VTX_INDX */
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 3, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
@@ -213,7 +213,7 @@ emit_mem2gmem_surf(struct fd_context *ctx, uint32_t base,
 	OUT_RING(ring, 0);                 /* VGT_MIN_VTX_INDX */
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 3, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index cf704ba26af..179bf9ce92d 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -227,7 +227,7 @@ fd3_clear_binning(struct fd_context *ctx, unsigned dirty)
 	fd_event_write(ctx, ring, PERFCOUNTER_STOP);
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
@@ -367,7 +367,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
 	fd_event_write(ctx, ring, PERFCOUNTER_STOP);
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, USE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 void
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 443a59de52b..1c17e2ddde0 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -781,7 +781,7 @@ fd3_emit_restore(struct fd_context *ctx)
 		OUT_PKT3(ring, CP_DRAW_INDX, 3);
 		OUT_RING(ring, 0x00000000);
 		OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
-				INDEX_SIZE_IGN, IGNORE_VISIBILITY));
+							INDEX_SIZE_IGN, IGNORE_VISIBILITY, 0));
 		OUT_RING(ring, 0);					/* NumIndices */
 	}
 
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index f92ccedd939..9b4f31c4070 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -274,7 +274,7 @@ emit_binning_workaround(struct fd_context *ctx)
 	OUT_PKT3(ring, CP_DRAW_INDX_2, 5);
 	OUT_RING(ring, 0x00000000);   /* viz query info. */
 	OUT_RING(ring, DRAW(DI_PT_RECTLIST, DI_SRC_SEL_IMMEDIATE,
-			INDEX_SIZE_32_BIT, IGNORE_VISIBILITY));
+						INDEX_SIZE_32_BIT, IGNORE_VISIBILITY, 0));
 	OUT_RING(ring, 2);            /* NumIndices */
 	OUT_RING(ring, 2);
 	OUT_RING(ring, 1);
@@ -329,7 +329,7 @@ emit_gmem2mem_surf(struct fd_context *ctx,
 			A3XX_RB_COPY_DEST_INFO_SWAP(fd3_pipe2swap(psurf->format)));
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
@@ -454,7 +454,7 @@ emit_mem2gmem_surf(struct fd_context *ctx, uint32_t base,
 	fd3_emit_gmem_restore_tex(ring, psurf);
 
 	fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+			DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
@@ -593,7 +593,7 @@ patch_draws(struct fd_context *ctx, enum pc_di_vis_cull_mode vismode)
 	unsigned i;
 	for (i = 0; i < fd_patch_num_elements(&ctx->draw_patches); i++) {
 		struct fd_cs_patch *patch = fd_patch_element(&ctx->draw_patches, i);
-		*patch->cs = patch->val | DRAW(0, 0, 0, vismode);
+		*patch->cs = patch->val | DRAW(0, 0, 0, vismode, 0);
 	}
 	util_dynarray_resize(&ctx->draw_patches, 0);
 }
@@ -786,7 +786,7 @@ emit_binning_pass(struct fd_context *ctx)
 		OUT_PKT3(ring, CP_DRAW_INDX, 3);
 		OUT_RING(ring, 0x00000000);
 		OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
-				INDEX_SIZE_IGN, IGNORE_VISIBILITY));
+							INDEX_SIZE_IGN, IGNORE_VISIBILITY, 0));
 		OUT_RING(ring, 0);             /* NumIndices */
 		fd_reset_wfi(ctx);
 	}
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_query.c b/src/gallium/drivers/freedreno/a3xx/fd3_query.c
index cf70ae3bd3c..7abab543427 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_query.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_query.c
@@ -65,7 +65,7 @@ occlusion_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring)
 	OUT_PKT3(ring, CP_DRAW_INDX, 3);
 	OUT_RING(ring, 0x00000000);
 	OUT_RING(ring, DRAW(DI_PT_POINTLIST_A2XX, DI_SRC_SEL_AUTO_INDEX,
-			INDEX_SIZE_IGN, USE_VISIBILITY));
+						INDEX_SIZE_IGN, USE_VISIBILITY, 0));
 	OUT_RING(ring, 0);             /* NumIndices */
 
 	fd_event_write(ctx, ring, ZPASS_DONE);
diff --git a/src/gallium/drivers/freedreno/freedreno_draw.h b/src/gallium/drivers/freedreno/freedreno_draw.h
index 6c890e7b97e..25e102f5067 100644
--- a/src/gallium/drivers/freedreno/freedreno_draw.h
+++ b/src/gallium/drivers/freedreno/freedreno_draw.h
@@ -46,6 +46,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		enum pc_di_primtype primtype,
 		enum pc_di_vis_cull_mode vismode,
 		enum pc_di_src_sel src_sel, uint32_t count,
+		uint8_t instances,
 		enum pc_di_index_size idx_type,
 		uint32_t idx_size, uint32_t idx_offset,
 		struct fd_bo *idx_bo)
@@ -63,7 +64,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		OUT_PKT3(ring, CP_DRAW_INDX, 3);
 		OUT_RING(ring, 0x00000000);
 		OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
-				INDEX_SIZE_IGN, USE_VISIBILITY));
+							INDEX_SIZE_IGN, USE_VISIBILITY, 0));
 		OUT_RING(ring, 0);             /* NumIndices */
 
 		/* ugg, hard-code register offset to avoid pulling in the
@@ -79,10 +80,10 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		/* leave vis mode blank for now, it will be patched up when
 		 * we know if we are binning or not
 		 */
-		OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0),
+		OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances),
 				&ctx->draw_patches);
 	} else {
-		OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode));
+		OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
 	}
 	OUT_RING(ring, count);             /* NumIndices */
 	if (idx_bo) {
@@ -138,7 +139,8 @@ fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
 	}
 
 	fd_draw(ctx, ring, ctx->primtypes[info->mode], vismode, src_sel,
-			info->count, idx_type, idx_size, idx_offset, idx_bo);
+			info->count, info->instance_count - 1,
+			idx_type, idx_size, idx_offset, idx_bo);
 }
 
 #endif /* FREEDRENO_DRAW_H_ */
diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index 0abc53f6a8b..ec1db94f649 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -85,14 +85,16 @@ extern bool fd_binning_enabled;
 
 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
 		enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
-		enum pc_di_vis_cull_mode vis_cull_mode)
+		enum pc_di_vis_cull_mode vis_cull_mode,
+		uint8_t instances)
 {
 	return (prim_type         << 0) |
 			(source_select     << 6) |
 			((index_size & 1)  << 11) |
 			((index_size >> 1) << 13) |
 			(vis_cull_mode     << 9) |
-			(1                 << 14);
+			(1                 << 14) |
+			(instances         << 24);
 }
 
 /* for tracking cmdstream positions that need to be patched: */