diff options
| author | Marek Olšák <[email protected]> | 2014-07-26 03:16:22 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2014-07-28 23:57:08 +0200 |
| commit | 0e7f56313d2a265cbdc2140f45dc4a0c6ae07e4e (patch) | |
| tree | 70fa9a08bd642cbaa2b15c52b39aa8a068662068 /src/gallium | |
| parent | 3d9e87406cfaf4a2bfef5b4bae50af94d1cc424f (diff) | |
radeonsi: fix a hang with streamout on Hawaii
I actually couldn't reproduce this one, but internal docs recommend this
workaround. Better safe than sorry.
Also, the number of dwords for the sync packets is increased by 4 instead
of 2, because it wasn't bumped last time when a new packet was added there.
Cc: [email protected]
Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 14 |
2 files changed, 14 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 5348b8db45f..dcec2bb3b4b 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -72,6 +72,7 @@ #define R600_CONTEXT_WAIT_3D_IDLE (1 << 17) #define R600_CONTEXT_WAIT_CP_DMA_IDLE (1 << 18) #define R600_CONTEXT_VGT_FLUSH (1 << 19) +#define R600_CONTEXT_VGT_STREAMOUT_SYNC (1 << 20) /* Debug flags. */ /* logging */ diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 1816540fa00..eb21ba1c906 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -868,11 +868,15 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); } + if (sctx->flags & R600_CONTEXT_VGT_STREAMOUT_SYNC) { + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0)); + } sctx->flags = 0; } -const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 13 }; /* number of CS dwords */ +const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 17 }; /* number of CS dwords */ static void si_get_draw_start_count(struct si_context *sctx, const struct pipe_draw_info *info, @@ -985,6 +989,14 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) } #endif + /* Workaround for a VGT hang when streamout is enabled. + * It must be done after drawing. */ + if (sctx->b.family == CHIP_HAWAII && + (sctx->b.streamout.streamout_enabled || + sctx->b.streamout.prims_gen_query_enabled)) { + sctx->b.flags |= R600_CONTEXT_VGT_STREAMOUT_SYNC; + } + /* Set the depth buffer as dirty. */ if (sctx->framebuffer.state.zsbuf) { struct pipe_surface *surf = sctx->framebuffer.state.zsbuf; |