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authorIlia Mirkin <[email protected]>2016-05-29 09:58:40 -0400
committerIlia Mirkin <[email protected]>2016-05-30 10:07:01 -0400
commit8cc80e396e0f604bdeb962fe35c32ca1e6b361f3 (patch)
tree424d0864745668ca33ed27c83f00c7ccef3cd756 /src/gallium
parent9444d71611b97a1f3102ba60b94ce1860a9961e9 (diff)
nvc0/ir: fix emission of predicate spill to register
The lane mask only applies to real mov's, while here we're using PSET. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index 1bb962f9e26..9159e342193 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1981,7 +1981,8 @@ CodeEmitterNVC0::emitMOV(const Instruction *i)
else
opc = HEX64(28000000, 00000004);
- opc |= i->lanes << 5;
+ if (i->src(0).getFile() != FILE_PREDICATE)
+ opc |= i->lanes << 5;
emitForm_B(i, opc);
} else {