diff options
author | Ian Romanick <[email protected]> | 2008-03-24 12:15:59 -0700 |
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committer | Ian Romanick <[email protected]> | 2008-03-25 18:15:58 -0700 |
commit | 84d8030735844785c3c97679db2bc1892a9c8c70 (patch) | |
tree | 58210e6137811dfc28b049d1f60e465d645c3ee2 /src/gallium | |
parent | e1543fa55c7972e3634f3f7ba297c010337dfb0d (diff) |
cell: Float convert-to and convert-from instructions use different shift bias
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c | 4 | ||||
-rw-r--r-- | src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h | 10 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c index 24be65bff9d..7f6bf577b26 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c +++ b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c @@ -267,10 +267,10 @@ void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \ emit_RI7(p, _op, rT, rA, imm); \ } -#define EMIT_RI8(_name, _op) \ +#define EMIT_RI8(_name, _op, bias) \ void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \ { \ - emit_RI8(p, _op, rT, rA, 155 - imm); \ + emit_RI8(p, _op, rT, rA, bias - imm); \ } #define EMIT_RI10(_name, _op) \ diff --git a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h index 5a1eb1ed8de..1cacc717b15 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h +++ b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h @@ -76,7 +76,7 @@ extern void spe_release_register(struct spe_function *p, int reg); #define EMIT_RI7(_name, _op) \ extern void _name (struct spe_function *p, unsigned rT, unsigned rA, \ int imm) -#define EMIT_RI8(_name, _op) \ +#define EMIT_RI8(_name, _op, bias) \ extern void _name (struct spe_function *p, unsigned rT, unsigned rA, \ int imm) #define EMIT_RI10(_name, _op) \ @@ -289,10 +289,10 @@ EMIT_RR (spe_dfnma, 0x35f); EMIT_R (spe_frest, 0x1b8); EMIT_R (spe_frsqest, 0x1b9); EMIT_RR (spe_fi, 0x3d4); -EMIT_RI8 (spe_csflt, 0x1da); -EMIT_RI8 (spe_cflts, 0x1d8); -EMIT_RI8 (spe_cuflt, 0x1db); -EMIT_RI8 (spe_cfltu, 0x1d9); +EMIT_RI8 (spe_csflt, 0x1da, 155); +EMIT_RI8 (spe_cflts, 0x1d8, 173); +EMIT_RI8 (spe_cuflt, 0x1db, 155); +EMIT_RI8 (spe_cfltu, 0x1d9, 173); EMIT_R (spe_frds, 0x3b9); EMIT_R (spe_fesd, 0x3b8); EMIT_RR (spe_dfceq, 0x3c3); |