diff options
author | Rob Clark <[email protected]> | 2018-07-09 12:36:10 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2018-07-18 10:10:45 -0400 |
commit | e4c225ab6f610a3989e7f7f7c6a2a957b92d4528 (patch) | |
tree | 9e955c3380c1f305c0bd6e3a4ff664b25463d964 /src/gallium | |
parent | 4c58db806449ec4e4cf14c1ffdce60ad5ac12adc (diff) |
freedreno/ir3: redirectable ir3 disasm output
For now it still goes to stdout, this will make it easier to support
output on stderr like what frameretrace expects.
(If we eventually have a proper GL extension for this, implementation
probably looks like dumping shader disasm to a tmp file and then dumping
that out over whatever mechanism is used.)
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_shader.c | 94 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_shader.h | 2 |
3 files changed, 48 insertions, 50 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c index b4db4f83fee..23d50063520 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c @@ -56,7 +56,7 @@ static void dump_info(struct ir3_shader_variant *so, const char *str) const char *type = ir3_shader_stage(so->shader); bin = ir3_shader_assemble(so, so->shader->compiler->gpu_id); debug_printf("; %s: %s\n", type, str); - ir3_shader_disasm(so, bin); + ir3_shader_disasm(so, bin, stdout); free(bin); } diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c index 64a2c8a65c7..15bda50b25b 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c @@ -157,9 +157,9 @@ assemble_variant(struct ir3_shader_variant *v) if (fd_mesa_debug & FD_DBG_DISASM) { struct ir3_shader_key key = v->key; - DBG("disassemble: type=%d, k={bp=%u,cts=%u,hp=%u}", v->type, + printf("disassemble: type=%d, k={bp=%u,cts=%u,hp=%u}", v->type, key.binning_pass, key.color_two_side, key.half_precision); - ir3_shader_disasm(v, bin); + ir3_shader_disasm(v, bin, stdout); } free(bin); @@ -375,29 +375,29 @@ ir3_shader_create_compute(struct ir3_compiler *compiler, /* do first pass optimization, ignoring the key: */ shader->nir = ir3_optimize_nir(shader, nir, NULL); if (fd_mesa_debug & FD_DBG_DISASM) { - DBG("dump nir%d: type=%d", shader->id, shader->type); + printf("dump nir%d: type=%d\n", shader->id, shader->type); nir_print_shader(shader->nir, stdout); } return shader; } -static void dump_reg(const char *name, uint32_t r) +static void dump_reg(FILE *out, const char *name, uint32_t r) { if (r != regid(63,0)) - debug_printf("; %s: r%d.%c\n", name, r >> 2, "xyzw"[r & 0x3]); + fprintf(out, "; %s: r%d.%c\n", name, r >> 2, "xyzw"[r & 0x3]); } -static void dump_output(struct ir3_shader_variant *so, +static void dump_output(FILE *out, struct ir3_shader_variant *so, unsigned slot, const char *name) { uint32_t regid; regid = ir3_find_output_regid(so, slot); - dump_reg(name, regid); + dump_reg(out, name, regid); } void -ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin) +ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out) { struct ir3 *ir = so->ir; struct ir3_register *reg; @@ -407,19 +407,19 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin) for (i = 0; i < ir->ninputs; i++) { if (!ir->inputs[i]) { - debug_printf("; in%d unused\n", i); + fprintf(out, "; in%d unused\n", i); continue; } reg = ir->inputs[i]->regs[0]; regid = reg->num; - debug_printf("@in(%sr%d.%c)\tin%d\n", + fprintf(out, "@in(%sr%d.%c)\tin%d\n", (reg->flags & IR3_REG_HALF) ? "h" : "", (regid >> 2), "xyzw"[regid & 0x3], i); } for (i = 0; i < ir->noutputs; i++) { if (!ir->outputs[i]) { - debug_printf("; out%d unused\n", i); + fprintf(out, "; out%d unused\n", i); continue; } /* kill shows up as a virtual output.. skip it! */ @@ -427,65 +427,63 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin) continue; reg = ir->outputs[i]->regs[0]; regid = reg->num; - debug_printf("@out(%sr%d.%c)\tout%d\n", + fprintf(out, "@out(%sr%d.%c)\tout%d\n", (reg->flags & IR3_REG_HALF) ? "h" : "", (regid >> 2), "xyzw"[regid & 0x3], i); } for (i = 0; i < so->immediates_count; i++) { - debug_printf("@const(c%d.x)\t", so->constbase.immediate + i); - debug_printf("0x%08x, 0x%08x, 0x%08x, 0x%08x\n", + fprintf(out, "@const(c%d.x)\t", so->constbase.immediate + i); + fprintf(out, "0x%08x, 0x%08x, 0x%08x, 0x%08x\n", so->immediates[i].val[0], so->immediates[i].val[1], so->immediates[i].val[2], so->immediates[i].val[3]); } -#ifdef DEBUG - disasm_a3xx(bin, so->info.sizedwords, 0, stdout); -#endif + disasm_a3xx(bin, so->info.sizedwords, 0, out); switch (so->type) { case SHADER_VERTEX: - debug_printf("; %s: outputs:", type); + fprintf(out, "; %s: outputs:", type); for (i = 0; i < so->outputs_count; i++) { uint8_t regid = so->outputs[i].regid; - debug_printf(" r%d.%c (%s)", + fprintf(out, " r%d.%c (%s)", (regid >> 2), "xyzw"[regid & 0x3], gl_varying_slot_name(so->outputs[i].slot)); } - debug_printf("\n"); - debug_printf("; %s: inputs:", type); + fprintf(out, "\n"); + fprintf(out, "; %s: inputs:", type); for (i = 0; i < so->inputs_count; i++) { uint8_t regid = so->inputs[i].regid; - debug_printf(" r%d.%c (cm=%x,il=%u,b=%u)", + fprintf(out, " r%d.%c (cm=%x,il=%u,b=%u)", (regid >> 2), "xyzw"[regid & 0x3], so->inputs[i].compmask, so->inputs[i].inloc, so->inputs[i].bary); } - debug_printf("\n"); + fprintf(out, "\n"); break; case SHADER_FRAGMENT: - debug_printf("; %s: outputs:", type); + fprintf(out, "; %s: outputs:", type); for (i = 0; i < so->outputs_count; i++) { uint8_t regid = so->outputs[i].regid; - debug_printf(" r%d.%c (%s)", + fprintf(out, " r%d.%c (%s)", (regid >> 2), "xyzw"[regid & 0x3], gl_frag_result_name(so->outputs[i].slot)); } - debug_printf("\n"); - debug_printf("; %s: inputs:", type); + fprintf(out, "\n"); + fprintf(out, "; %s: inputs:", type); for (i = 0; i < so->inputs_count; i++) { uint8_t regid = so->inputs[i].regid; - debug_printf(" r%d.%c (%s,cm=%x,il=%u,b=%u)", + fprintf(out, " r%d.%c (%s,cm=%x,il=%u,b=%u)", (regid >> 2), "xyzw"[regid & 0x3], gl_varying_slot_name(so->inputs[i].slot), so->inputs[i].compmask, so->inputs[i].inloc, so->inputs[i].bary); } - debug_printf("\n"); + fprintf(out, "\n"); break; default: /* TODO */ @@ -493,53 +491,53 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin) } /* print generic shader info: */ - debug_printf("; %s prog %d/%d: %u instructions, %d half, %d full\n", + fprintf(out, "; %s prog %d/%d: %u instructions, %d half, %d full\n", type, so->shader->id, so->id, so->info.instrs_count, so->info.max_half_reg + 1, so->info.max_reg + 1); - debug_printf("; %d const, %u constlen\n", + fprintf(out, "; %d const, %u constlen\n", so->info.max_const + 1, so->constlen); - debug_printf("; %u (ss), %u (sy)\n", so->info.ss, so->info.sy); + fprintf(out, "; %u (ss), %u (sy)\n", so->info.ss, so->info.sy); /* print shader type specific info: */ switch (so->type) { case SHADER_VERTEX: - dump_output(so, VARYING_SLOT_POS, "pos"); - dump_output(so, VARYING_SLOT_PSIZ, "psize"); + dump_output(out, so, VARYING_SLOT_POS, "pos"); + dump_output(out, so, VARYING_SLOT_PSIZ, "psize"); break; case SHADER_FRAGMENT: - dump_reg("pos (bary)", so->pos_regid); - dump_output(so, FRAG_RESULT_DEPTH, "posz"); + dump_reg(out, "pos (bary)", so->pos_regid); + dump_output(out, so, FRAG_RESULT_DEPTH, "posz"); if (so->color0_mrt) { - dump_output(so, FRAG_RESULT_COLOR, "color"); + dump_output(out, so, FRAG_RESULT_COLOR, "color"); } else { - dump_output(so, FRAG_RESULT_DATA0, "data0"); - dump_output(so, FRAG_RESULT_DATA1, "data1"); - dump_output(so, FRAG_RESULT_DATA2, "data2"); - dump_output(so, FRAG_RESULT_DATA3, "data3"); - dump_output(so, FRAG_RESULT_DATA4, "data4"); - dump_output(so, FRAG_RESULT_DATA5, "data5"); - dump_output(so, FRAG_RESULT_DATA6, "data6"); - dump_output(so, FRAG_RESULT_DATA7, "data7"); + dump_output(out, so, FRAG_RESULT_DATA0, "data0"); + dump_output(out, so, FRAG_RESULT_DATA1, "data1"); + dump_output(out, so, FRAG_RESULT_DATA2, "data2"); + dump_output(out, so, FRAG_RESULT_DATA3, "data3"); + dump_output(out, so, FRAG_RESULT_DATA4, "data4"); + dump_output(out, so, FRAG_RESULT_DATA5, "data5"); + dump_output(out, so, FRAG_RESULT_DATA6, "data6"); + dump_output(out, so, FRAG_RESULT_DATA7, "data7"); } /* these two are hard-coded since we don't know how to * program them to anything but all 0's... */ if (so->frag_coord) - debug_printf("; fragcoord: r0.x\n"); + fprintf(out, "; fragcoord: r0.x\n"); if (so->frag_face) - debug_printf("; fragface: hr0.x\n"); + fprintf(out, "; fragface: hr0.x\n"); break; default: /* TODO */ break; } - debug_printf("\n"); + fprintf(out, "\n"); } uint64_t diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h index dba98b96258..cff0206b7ac 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h @@ -381,7 +381,7 @@ ir3_shader_create_compute(struct ir3_compiler *compiler, void ir3_shader_destroy(struct ir3_shader *shader); struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader, struct ir3_shader_key key, struct pipe_debug_callback *debug); -void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin); +void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out); uint64_t ir3_shader_outputs(const struct ir3_shader *so); struct fd_ringbuffer; |