diff options
| author | Caio Marcelo de Oliveira Filho <[email protected]> | 2018-09-19 10:16:27 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2019-01-23 00:35:56 -0800 |
| commit | e0485a1dd7f0df90fb7049c23425aa693a284bad (patch) | |
| tree | 915cbb0b1768020b3417896a75cd82ee2d6ad2ee /src/gallium | |
| parent | 8e26d534befe7cdd3bd21aa34f3ff63c1fa7baea (diff) | |
gallium: Add PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS
In the Intel backend, it makes the most sense to treat gl_TessLevelInner
and gl_TessLevelOuter as ordinary shader inputs. For Radeon, it makes
more sense to treat them as system values which get special handling.
We already have a compiler option for this, but the Iris driver will
need a capability bit so we can set it appropriately.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/auxiliary/util/u_screen.c | 3 | ||||
| -rw-r--r-- | src/gallium/include/pipe/p_defines.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/util/u_screen.c b/src/gallium/auxiliary/util/u_screen.c index c14edde8592..2d32ca8b240 100644 --- a/src/gallium/auxiliary/util/u_screen.c +++ b/src/gallium/auxiliary/util/u_screen.c @@ -263,6 +263,9 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen, case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: return 1; + case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS: + return 0; + case PIPE_CAP_TGSI_FS_FBFETCH: case PIPE_CAP_TGSI_MUL_ZERO_WINS: case PIPE_CAP_DOUBLES: diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index ae53c723c7e..5a769ecf0e5 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -807,6 +807,7 @@ enum pipe_cap PIPE_CAP_TGSI_CAN_READ_OUTPUTS, PIPE_CAP_NATIVE_FENCE_FD, PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY, + PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS, PIPE_CAP_TGSI_FS_FBFETCH, PIPE_CAP_TGSI_MUL_ZERO_WINS, PIPE_CAP_DOUBLES, |