diff options
| author | Sagar Ghuge <[email protected]> | 2019-10-23 16:24:46 -0700 |
|---|---|---|
| committer | Sagar Ghuge <[email protected]> | 2019-10-29 14:46:15 -0700 |
| commit | c4011867624808c4c51ae1d19dfd09fd1d455670 (patch) | |
| tree | 550ecb12999538663b61dd376eb6ef7ae0850331 /src/gallium | |
| parent | 53d472df24d4bc05359120df0615321318922d6d (diff) | |
intel: Track stencil aux usage on Gen12+
Enable stencil compression enable and control surface enable bit if
stencil buffer lossless compression is enabled.
v2: Remove unnecessary GEN_GEN check (Nanley Chery)
v3: (Nanley Chery)
- Change commit subject tag from intel/isl to intel
- Keep assignment order correct
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index e55ccc08b61..a53e76c004e 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -2993,6 +2993,7 @@ iris_set_framebuffer_state(struct pipe_context *ctx, if (stencil_res) { view.usage |= ISL_SURF_USAGE_STENCIL_BIT; + info.stencil_aux_usage = stencil_res->aux.usage; info.stencil_surf = &stencil_res->surf; info.stencil_address = stencil_res->bo->gtt_offset + stencil_res->offset; if (!zres) { |