broadcom/vc5: Set up per-MRT clear colors.

Fixes fbo-mrt-alphatest.

3 files changed, 22 insertions, 41 deletions

diff --git a/src/gallium/drivers/vc5/vc5_context.h b/src/gallium/drivers/vc5/vc5_context.h
index 96b21b8fa09..d4f9e1eac6b 100644
--- a/src/gallium/drivers/vc5/vc5_context.h
+++ b/src/gallium/drivers/vc5/vc5_context.h
@@ -247,7 +247,7 @@ struct vc5_job {
          * (either clears or draws).
          */
         uint32_t resolve;
-        uint32_t clear_color[2];
+        uint32_t clear_color[4][4];
         float clear_z;
         uint8_t clear_s;
 
diff --git a/src/gallium/drivers/vc5/vc5_draw.c b/src/gallium/drivers/vc5/vc5_draw.c
index c4e9973f949..fe5a2c21293 100644
--- a/src/gallium/drivers/vc5/vc5_draw.c
+++ b/src/gallium/drivers/vc5/vc5_draw.c
@@ -516,17 +516,6 @@ vc5_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
                 vc5_flush(pctx);
 }
 
-static uint32_t
-pack_rgba(enum pipe_format format, const float *rgba)
-{
-        union util_color uc;
-        util_pack_color(rgba, format, &uc);
-        if (util_format_get_blocksize(format) == 2)
-                return uc.us;
-        else
-                return uc.ui[0];
-}
-
 static void
 vc5_clear(struct pipe_context *pctx, unsigned buffers,
           const union pipe_color_union *color, double depth, unsigned stencil)
@@ -543,32 +532,22 @@ vc5_clear(struct pipe_context *pctx, unsigned buffers,
                 job = vc5_get_job_for_fbo(vc5);
         }
 
-        if (buffers & PIPE_CLEAR_COLOR0) {
+        for (int i = 0; i < VC5_MAX_DRAW_BUFFERS; i++) {
+                uint32_t bit = PIPE_CLEAR_COLOR0 << i;
+                if (!(buffers & bit))
+                        continue;
+
+                struct pipe_surface *cbuf = vc5->framebuffer.cbufs[i];
                 struct vc5_resource *rsc =
-                        vc5_resource(vc5->framebuffer.cbufs[0]->texture);
-                uint32_t clear_color;
-
-#if 0
-                if (vc5_rt_format_is_565(vc5->framebuffer.cbufs[0]->format)) {
-                        /* In 565 mode, the hardware will be packing our color
-                         * for us.
-                         */
-                        clear_color = pack_rgba(PIPE_FORMAT_R8G8B8A8_UNORM,
-                                                color->f);
-                } else {
-                        /* Otherwise, we need to do this packing because we
-                         * support multiple swizzlings of RGBA8888.
-                         */
-                        clear_color =
-                                pack_rgba(vc5->framebuffer.cbufs[0]->format,
-                                          color->f);
-                }
-#endif
-                clear_color = pack_rgba(vc5->framebuffer.cbufs[0]->format,
-                                        color->f);
+                        vc5_resource(cbuf->texture);
+
+                union util_color uc;
+                util_pack_color(color->f, cbuf->format, &uc);
+
+                memcpy(job->clear_color[i], uc.ui,
+                       util_format_get_blocksize(cbuf->format));
 
-                job->clear_color[0] = job->clear_color[1] = clear_color;
-                rsc->initialized_buffers |= (buffers & PIPE_CLEAR_COLOR0);
+                rsc->initialized_buffers |= bit;
         }
 
         unsigned zsclear = buffers & PIPE_CLEAR_DEPTHSTENCIL;
diff --git a/src/gallium/drivers/vc5/vc5_rcl.c b/src/gallium/drivers/vc5/vc5_rcl.c
index ebc77dcce06..83b383acd1a 100644
--- a/src/gallium/drivers/vc5/vc5_rcl.c
+++ b/src/gallium/drivers/vc5/vc5_rcl.c
@@ -147,6 +147,13 @@ vc5_emit_rcl(struct vc5_job *job)
                         if (job->resolve & PIPE_CLEAR_COLOR0 << i)
                                 rsc->writes++;
                 }
+
+                cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART1,
+                        clear) {
+                        clear.clear_color_low_32_bits = job->clear_color[i][0];
+                        clear.clear_color_next_24_bits = job->clear_color[i][1] & 0xffffff;
+                        clear.render_target_number = i;
+                };
         }
 
         /* TODO: Don't bother emitting if we don't load/clear Z/S. */
@@ -174,11 +181,6 @@ vc5_emit_rcl(struct vc5_job *job)
                         rsc->writes++;
         }
 
-        cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART1,
-                clear) {
-                clear.clear_color_low_32_bits = job->clear_color[0];
-        };
-
         /* Ends rendering mode config. */
         cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_Z_STENCIL_CLEAR_VALUES,
                 clear) {