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authorChristian König <[email protected]>2013-09-21 15:34:38 +0200
committerChristian König <[email protected]>2013-09-22 10:33:20 +0200
commit8bbcc43ad9d8cadfbac86163d0037938c3420830 (patch)
tree429cf7e474d6afef74214700fa70025c5c7bc106 /src/gallium
parent01a0dbcb96f133737a7f71b21125a58684d883cc (diff)
radeon/uvd: async flush the UVD cs
No need to block for the CS thread here. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 518978eadf6..fa8110541c5 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -110,7 +110,7 @@ static void flush(struct ruvd_decoder *dec)
while(dec->cs->cdw % 16)
pm4[dec->cs->cdw++] = RUVD_PKT2();
- dec->ws->cs_flush(dec->cs, 0, 0);
+ dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
}
/* add a new set register command to the IB */