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authorMarek Olšák <[email protected]>2018-06-01 19:29:45 -0400
committerMarek Olšák <[email protected]>2018-06-13 22:00:12 -0400
commit6d671078a8eb683a4a978ca4f9d4e41cbb399bf8 (patch)
tree7b12bf85c98292bf0474e59c45704a1393485ac2 /src/gallium
parenta4312742a5a01270e1bf38a18a3ce776ea96e970 (diff)
radeonsi/gfx9: fix si_get_buffer_from_descriptors for 48-bit pointers
This fixes: GL45-CTS.pipeline_statistics_query_tests_ARB.functional_compute_shader_invocations Cc: 18.0 18.1 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 1d14c9df1e1..57a312463c9 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -94,7 +94,7 @@ static uint32_t null_image_descriptor[8] = {
* descriptor */
};
-static uint64_t si_desc_extract_buffer_address(uint32_t *desc)
+static uint64_t si_desc_extract_buffer_address(const uint32_t *desc)
{
uint64_t va = desc[0] |
((uint64_t)G_008F04_BASE_ADDRESS_HI(desc[1]) << 32);
@@ -1054,7 +1054,7 @@ static void si_get_buffer_from_descriptors(struct si_buffer_resources *buffers,
*size = desc[2];
assert(G_008F04_STRIDE(desc[1]) == 0);
- va = ((uint64_t)desc[1] << 32) | desc[0];
+ va = si_desc_extract_buffer_address(desc);
assert(va >= res->gpu_address && va + *size <= res->gpu_address + res->bo_size);
*offset = va - res->gpu_address;