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authorCorbin Simpson <[email protected]>2009-01-26 02:18:56 -0800
committerCorbin Simpson <[email protected]>2009-02-01 23:30:29 -0800
commit3e3122467f1e9f6dde77762d1a35a56f89fb25ce (patch)
tree3d7c71582764b0a7da570b9cd1e96e2504de20e8 /src/gallium
parent29a4f5493529042d1068a7d35da1e7f542474503 (diff)
r300: Deobfuscate a few registers, fix inaccurate variable names.
It's not "pipes", it's floating-point vertex processors. Completely different.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/r300/r300_chipset.c26
-rw-r--r--src/gallium/drivers/r300/r300_chipset.h9
-rw-r--r--src/gallium/drivers/r300/r300_surface.c10
3 files changed, 25 insertions, 20 deletions
diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c
index 494c9e54c02..4c84be26efa 100644
--- a/src/gallium/drivers/r300/r300_chipset.c
+++ b/src/gallium/drivers/r300/r300_chipset.c
@@ -31,7 +31,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
/* Reasonable defaults */
caps->has_tcl = TRUE;
caps->is_r500 = FALSE;
- caps->num_vert_pipes = 4;
+ caps->num_vert_fpus = 4;
/* Note: These are not ordered by PCI ID. I leave that task to GCC,
@@ -112,7 +112,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x4A50:
case 0x4A54:
caps->family = CHIP_FAMILY_R420;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x5548:
@@ -125,7 +125,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x5554:
case 0x5D57:
caps->family = CHIP_FAMILY_R423;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x554C:
@@ -136,7 +136,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x5D49:
case 0x5D4A:
caps->family = CHIP_FAMILY_R430;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x5D4C:
@@ -146,7 +146,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x5D50:
case 0x5D52:
caps->family = CHIP_FAMILY_R480;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x4B49:
@@ -154,7 +154,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x4B4B:
case 0x4B4C:
caps->family = CHIP_FAMILY_R481;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x5E4C:
@@ -170,7 +170,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x5E4B:
case 0x5E4D:
caps->family = CHIP_FAMILY_RV410;
- caps->num_vert_pipes = 6;
+ caps->num_vert_fpus = 6;
break;
case 0x5954:
@@ -226,7 +226,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x710E:
case 0x710F:
caps->family = CHIP_FAMILY_R520;
- caps->num_vert_pipes = 8;
+ caps->num_vert_fpus = 8;
caps->is_r500 = TRUE;
break;
@@ -269,7 +269,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x7210:
case 0x7211:
caps->family = CHIP_FAMILY_RV515;
- caps->num_vert_pipes = 2;
+ caps->num_vert_fpus = 2;
caps->is_r500 = TRUE;
break;
@@ -290,7 +290,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x71DA:
case 0x71DE:
caps->family = CHIP_FAMILY_RV530;
- caps->num_vert_pipes = 5;
+ caps->num_vert_fpus = 5;
caps->is_r500 = TRUE;
break;
@@ -310,13 +310,13 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x724F:
case 0x7284:
caps->family = CHIP_FAMILY_R580;
- caps->num_vert_pipes = 8;
+ caps->num_vert_fpus = 8;
caps->is_r500 = TRUE;
break;
case 0x7280:
caps->family = CHIP_FAMILY_RV570;
- caps->num_vert_pipes = 5;
+ caps->num_vert_fpus = 5;
caps->is_r500 = TRUE;
break;
@@ -332,7 +332,7 @@ void r300_parse_chipset(struct r300_capabilities* caps)
case 0x7293:
case 0x7297:
caps->family = CHIP_FAMILY_RV560;
- caps->num_vert_pipes = 5;
+ caps->num_vert_fpus = 5;
caps->is_r500 = TRUE;
break;
diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h
index c4104a65cb1..a9cd372ec55 100644
--- a/src/gallium/drivers/r300/r300_chipset.h
+++ b/src/gallium/drivers/r300/r300_chipset.h
@@ -32,14 +32,15 @@ struct r300_capabilities {
uint32_t pci_id;
/* Chipset family */
int family;
- /* The number of vertex pipes */
- int num_vert_pipes;
+ /* The number of vertex floating-point units */
+ int num_vert_fpus;
/* The number of fragment pipes */
int num_frag_pipes;
/* Whether or not TCL is physically present */
boolean has_tcl;
- /* Whether or not this is an RV515 or newer; R500s have many features:
- * - Extra bit on texture sizes
+ /* Whether or not this is an RV515 or newer; R500s have many differences
+ * that require extra consideration, compared to their R3xx cousins:
+ * - Extra bit of width and height on texture sizes
* - Blend color is split across two registers
* - Universal Shader (US) block used for fragment shaders */
boolean is_r500;
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 226cc7fc6cf..9a4b3455d1d 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -32,6 +32,7 @@ static void r300_surface_fill(struct pipe_context* pipe,
{
struct r300_context* r300 = r300_context(pipe);
CS_LOCALS(r300);
+ struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps;
float r, g, b, a;
r = (float)((color >> 16) & 0xff) / 255.0f;
g = (float)((color >> 8) & 0xff) / 255.0f;
@@ -51,7 +52,6 @@ OUT_CS_REG(0x1DA4, 0x43002000);
OUT_CS_REG(0x1DA8, 0x3F000000);
OUT_CS_REG(0x1DAC, 0x3F000000);
OUT_CS_REG(0x2284, 0x00000000);
-OUT_CS_REG(0x2080, 0x0030046A);
OUT_CS_REG(0x20B0, 0x0000043F);
OUT_CS_REG(0x20B4, 0x00000008);
OUT_CS_REG(0x2134, 0x00FFFFFF);
@@ -76,7 +76,8 @@ OUT_CS_REG(0x22D8, 0x00000000);
OUT_CS_REG(0x4008, 0x00000007);
OUT_CS_REG(0x4010, 0x66666666);
OUT_CS_REG(0x4014, 0x06666666);
-OUT_CS_REG(0x4018, 0x00000011);
+/* XXX why doesn't classic Mesa write the number of pipes, too? */
+OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16);
OUT_CS_REG(0x401C, 0x00000004);
OUT_CS_REG(0x4020, 0x00000000);
OUT_CS_REG(0x4104, 0x00000000);
@@ -286,7 +287,10 @@ OUT_CS_REG(0x46C0, 0x1C000000);
OUT_CS_REG(0x49C0, 0x00040889);
OUT_CS_REG(0x47C0, 0x01000000);
OUT_CS_REG(0x2284, 0x00000000);
-OUT_CS_REG(0x2080, 0x0030045A);
+/* XXX these magic numbers should be explained when
+ * this becomes a cached state object */
+OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+ (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
OUT_CS_REG(0x22D0, 0x00100000);
OUT_CS_REG(0x22D4, 0x00000000);
OUT_CS_REG(0x22D8, 0x00000001);