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authorChia-I Wu <[email protected]>2014-09-07 01:10:01 +0800
committerChia-I Wu <[email protected]>2014-09-09 13:31:37 +0800
commitc81a973e04f2955d6add9036e9b6c96da5bc8941 (patch)
tree6cbdb568ab4a301dfd46f8feb3431dd2ca4b47af /src/gallium
parent6cbd1f4bd3957d1c6645e519f6609b4915576f4c (diff)
ilo: convert GPE surface functions to use ilo_builder
Make these changes ilo_cp_steal_ptr() and memcpy() -> ilo_builder_surface_write() ilo_cp_steal() and ilo_cp_write() -> ilo_builder_surface_write() ilo_cp_write_bo() -> ilo_builder_surface_reloc() and use this chance to drop the "_emit_" infix.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c20
-rw-r--r--src/gallium/drivers/ilo/ilo_gpe_gen6.h72
2 files changed, 36 insertions, 56 deletions
diff --git a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
index 0a629f0625c..40f356e9747 100644
--- a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
@@ -884,12 +884,12 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
if (!surface) {
surface_state[i] =
- gen6_emit_SURFACE_STATE(p->dev, &fb->null_rt, true, p->cp);
+ gen6_SURFACE_STATE(&p->cp->builder, &fb->null_rt, true);
}
else {
assert(surface && surface->is_rt);
surface_state[i] =
- gen6_emit_SURFACE_STATE(p->dev, &surface->u.rt, true, p->cp);
+ gen6_SURFACE_STATE(&p->cp->builder, &surface->u.rt, true);
}
}
@@ -899,7 +899,7 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
*/
if (i == 0) {
surface_state[i] =
- gen6_emit_SURFACE_STATE(p->dev, &fb->null_rt, true, p->cp);
+ gen6_SURFACE_STATE(&p->cp->builder, &fb->null_rt, true);
i++;
}
@@ -938,8 +938,8 @@ gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
(target < so->count) ? so->states[target] : NULL;
if (so_target) {
- surface_state[i] = gen6_emit_so_SURFACE_STATE(p->dev,
- so_target, so_info, i, p->cp);
+ surface_state[i] = gen6_so_SURFACE_STATE(&p->cp->builder,
+ so_target, so_info, i);
}
else {
surface_state[i] = 0;
@@ -1004,7 +1004,7 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
(const struct ilo_view_cso *) view->states[i];
surface_state[i] =
- gen6_emit_SURFACE_STATE(p->dev, &cso->surface, false, p->cp);
+ gen6_SURFACE_STATE(&p->cp->builder, &cso->surface, false);
}
else {
surface_state[i] = 0;
@@ -1057,8 +1057,8 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
count = util_last_bit(cbuf->enabled_mask);
for (i = 0; i < count; i++) {
if (cbuf->cso[i].resource) {
- surface_state[i] = gen6_emit_SURFACE_STATE(p->dev,
- &cbuf->cso[i].surface, false, p->cp);
+ surface_state[i] = gen6_SURFACE_STATE(&p->cp->builder,
+ &cbuf->cso[i].surface, false);
}
else {
surface_state[i] = 0;
@@ -1127,8 +1127,8 @@ gen6_pipeline_state_binding_tables(struct ilo_3d_pipeline *p,
if (size < session->num_surfaces[shader_type])
size = session->num_surfaces[shader_type];
- *binding_table_state = gen6_emit_BINDING_TABLE_STATE(p->dev,
- surface_state, size, p->cp);
+ *binding_table_state = gen6_BINDING_TABLE_STATE(&p->cp->builder,
+ surface_state, size);
*binding_table_state_size = size;
}
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen6.h b/src/gallium/drivers/ilo/ilo_gpe_gen6.h
index 24f7d156934..719c63700d1 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen6.h
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen6.h
@@ -2288,16 +2288,14 @@ gen6_emit_SCISSOR_RECT(const struct ilo_dev_info *dev,
}
static inline uint32_t
-gen6_emit_BINDING_TABLE_STATE(const struct ilo_dev_info *dev,
- uint32_t *surface_states,
- int num_surface_states,
- struct ilo_cp *cp)
+gen6_BINDING_TABLE_STATE(struct ilo_builder *builder,
+ uint32_t *surface_states,
+ int num_surface_states)
{
- const int state_align = 32 / 4;
+ const int state_align = 32;
const int state_len = num_surface_states;
- uint32_t state_offset, *dw;
- ILO_GPE_VALID_GEN(dev, 6, 7.5);
+ ILO_GPE_VALID_GEN(builder->dev, 6, 7.5);
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 69:
@@ -2309,62 +2307,44 @@ gen6_emit_BINDING_TABLE_STATE(const struct ilo_dev_info *dev,
if (!num_surface_states)
return 0;
- dw = ilo_cp_steal_ptr(cp, ILO_BUILDER_ITEM_BINDING_TABLE,
- state_len, state_align, &state_offset);
- memcpy(dw, surface_states,
- num_surface_states * sizeof(surface_states[0]));
-
- return state_offset;
+ return ilo_builder_surface_write(builder, ILO_BUILDER_ITEM_BINDING_TABLE,
+ state_align, state_len, surface_states);
}
static inline uint32_t
-gen6_emit_SURFACE_STATE(const struct ilo_dev_info *dev,
- const struct ilo_view_surface *surf,
- bool for_render,
- struct ilo_cp *cp)
+gen6_SURFACE_STATE(struct ilo_builder *builder,
+ const struct ilo_view_surface *surf,
+ bool for_render)
{
- const int state_align = 32 / 4;
- const int state_len = (dev->gen >= ILO_GEN(7)) ? 8 : 6;
+ const int state_align = 32;
+ const int state_len = (builder->dev->gen >= ILO_GEN(7)) ? 8 : 6;
uint32_t state_offset;
- ILO_GPE_VALID_GEN(dev, 6, 7.5);
-
- ilo_cp_steal(cp, ILO_BUILDER_ITEM_SURFACE,
- state_len, state_align, &state_offset);
+ ILO_GPE_VALID_GEN(builder->dev, 6, 7.5);
- STATIC_ASSERT(Elements(surf->payload) >= 8);
+ state_offset = ilo_builder_surface_write(builder, ILO_BUILDER_ITEM_SURFACE,
+ state_align, state_len, surf->payload);
- ilo_cp_write(cp, surf->payload[0]);
- ilo_cp_write_bo(cp, surf->payload[1], surf->bo,
- (for_render) ? INTEL_RELOC_WRITE : 0);
- ilo_cp_write(cp, surf->payload[2]);
- ilo_cp_write(cp, surf->payload[3]);
- ilo_cp_write(cp, surf->payload[4]);
- ilo_cp_write(cp, surf->payload[5]);
-
- if (dev->gen >= ILO_GEN(7)) {
- ilo_cp_write(cp, surf->payload[6]);
- ilo_cp_write(cp, surf->payload[7]);
+ if (surf->bo) {
+ ilo_builder_surface_reloc(builder, state_offset, 1, surf->bo,
+ surf->payload[1], (for_render) ? INTEL_RELOC_WRITE : 0);
}
- ilo_cp_end(cp);
-
return state_offset;
}
static inline uint32_t
-gen6_emit_so_SURFACE_STATE(const struct ilo_dev_info *dev,
- const struct pipe_stream_output_target *so,
- const struct pipe_stream_output_info *so_info,
- int so_index,
- struct ilo_cp *cp)
+gen6_so_SURFACE_STATE(struct ilo_builder *builder,
+ const struct pipe_stream_output_target *so,
+ const struct pipe_stream_output_info *so_info,
+ int so_index)
{
struct ilo_buffer *buf = ilo_buffer(so->buffer);
unsigned bo_offset, struct_size;
enum pipe_format elem_format;
struct ilo_view_surface surf;
- ILO_GPE_VALID_GEN(dev, 6, 6);
+ ILO_GPE_VALID_GEN(builder->dev, 6, 6);
bo_offset = so->buffer_offset + so_info->output[so_index].dst_offset * 4;
struct_size = so_info->stride[so_info->output[so_index].output_buffer] * 4;
@@ -2388,10 +2368,10 @@ gen6_emit_so_SURFACE_STATE(const struct ilo_dev_info *dev,
break;
}
- ilo_gpe_init_view_surface_for_buffer_gen6(dev, buf, bo_offset, so->buffer_size,
- struct_size, elem_format, false, true, &surf);
+ ilo_gpe_init_view_surface_for_buffer_gen6(builder->dev, buf, bo_offset,
+ so->buffer_size, struct_size, elem_format, false, true, &surf);
- return gen6_emit_SURFACE_STATE(dev, &surf, false, cp);
+ return gen6_SURFACE_STATE(builder, &surf, false);
}
static inline uint32_t