diff options
| author | Eric Anholt <[email protected]> | 2017-12-28 16:42:53 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2018-01-03 14:31:36 -0800 |
| commit | 44237b3f85fb8547e29ec8d090a3a72ce095e2a2 (patch) | |
| tree | e81294357da98753864a17a062881b714897a260 /src/gallium | |
| parent | e60e3a56a2edfdf773a388d4dfc0791137f039f1 (diff) | |
broadcom/vc5: Fix image_h value for CPU-side tiling on miplevels > 1.
Fixes overflow that caused failure in
dEQP-GLES3.functional.texture.filtering.2d.sizes.128x128_linear.
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/vc5/vc5_resource.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c index ddf4d5d377a..0e4aaa19246 100644 --- a/src/gallium/drivers/vc5/vc5_resource.c +++ b/src/gallium/drivers/vc5/vc5_resource.c @@ -133,7 +133,8 @@ vc5_resource_transfer_unmap(struct pipe_context *pctx, slice->stride, trans->map, ptrans->stride, slice->tiling, rsc->cpp, - rsc->base.height0, + u_minify(rsc->base.height0, + ptrans->level), &ptrans->box); } free(trans->map); |