diff options
| author | Marek Olšák <[email protected]> | 2012-01-29 07:21:03 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2012-01-31 02:18:16 +0100 |
| commit | 0569f13d2b6239dbbc693781d806826924b0ed16 (patch) | |
| tree | e6b75d36a823f3e26212e227650557823725ec20 /src/gallium | |
| parent | a494301f7fd4c93df67396d296a3edc6acfa44c3 (diff) | |
r600g: don't use register mask for TA_CNTL_AUX
Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 7f7e4986b02..3c9723c754e 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1227,8 +1227,12 @@ static void r600_set_seamless_cubemap(struct r600_pipe_context *rctx, boolean en rstate->id = R600_PIPE_STATE_SEAMLESS_CUBEMAP; r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, - (enable ? 0 : S_009508_DISABLE_CUBE_WRAP(1)), - 1, NULL, 0); + (enable ? 0 : S_009508_DISABLE_CUBE_WRAP(1)) | + S_009508_DISABLE_CUBE_ANISO(1) | + S_009508_SYNC_GRADIENT(1) | + S_009508_SYNC_WALKER(1) | + S_009508_SYNC_ALIGNER(1), + 0xFFFFFFFF, NULL, 0); free(rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP]); rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP] = rstate; @@ -1995,21 +1999,11 @@ void r600_init_config(struct r600_pipe_context *rctx) if (rctx->chip_class >= R700) { r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00004000, 0xFFFFFFFF, NULL, 0); - r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, - S_009508_DISABLE_CUBE_ANISO(1) | - S_009508_SYNC_GRADIENT(1) | - S_009508_SYNC_WALKER(1) | - S_009508_SYNC_ALIGNER(1), 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x00000000, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 0x00420204, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 0x00000000, 0xFFFFFFFF, NULL, 0); } else { r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00000000, 0xFFFFFFFF, NULL, 0); - r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, - S_009508_DISABLE_CUBE_ANISO(1) | - S_009508_SYNC_GRADIENT(1) | - S_009508_SYNC_WALKER(1) | - S_009508_SYNC_ALIGNER(1), 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x82000000, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 0x01020204, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 0x00000001, 0xFFFFFFFF, NULL, 0); @@ -2047,6 +2041,8 @@ void r600_init_config(struct r600_pipe_context *rctx) r600_pipe_state_add_reg(rstate, R_028AA0_VGT_INSTANCE_STEP_RATE_0, 0x00000000, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_028AA4_VGT_INSTANCE_STEP_RATE_1, 0x00000000, 0xFFFFFFFF, NULL, 0); r600_context_pipe_state_set(&rctx->ctx, rstate); + + r600_set_seamless_cubemap(rctx, FALSE); } void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader) |