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authorIlia Mirkin <[email protected]>2017-02-10 01:55:08 -0500
committerIlia Mirkin <[email protected]>2017-02-11 20:25:26 -0500
commitb38aab50a04b63038a42b7e4da3f8b5e9dbb8f24 (patch)
tree27db778bf087d59c6e902437d17d506234b7830a /src/gallium
parent2b0580123ed5b87ba00df93d174e20eabd9d1ecd (diff)
nv50/ir: convert an ATOM.EXCH without a destination into a store
On SM35 there does not appear to be a way to emit a ATOM.EXCH with a null destination. This should be functionally equivalent to a plain store however, so just do that. Fixes GL45-CTS.compute_shader.atomic-case2 on SM35. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index d79e87dc9f6..79403c93dfd 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -3549,6 +3549,11 @@ DeadCodeElim::visit(BasicBlock *bb)
i->op == OP_SUREDP ||
i->op == OP_SUREDB) {
i->setDef(0, NULL);
+ if (i->op == OP_ATOM && i->subOp == NV50_IR_SUBOP_ATOM_EXCH) {
+ i->cache = CACHE_CV;
+ i->op = OP_STORE;
+ i->subOp = 0;
+ }
} else if (i->op == OP_LOAD && i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
i->setDef(0, i->getDef(1));
i->setDef(1, NULL);