radeon: move streamout buffer config to streamout enable function. (v2)

This will be used here later.

v2: update atom sizes
add check for old vs new enabled mask

Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

2 files changed, 15 insertions, 9 deletions

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index d225f2528ab..74d747f730b 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -329,6 +329,9 @@ struct r600_streamout {
 	 * it must be set explicitly when binding a shader. */
 	unsigned			*stride_in_dw;
 
+	/* The state of VGT_STRMOUT_BUFFER_(CONFIG|EN). */
+	unsigned			hw_enabled_mask;
+
 	/* The state of VGT_STRMOUT_(CONFIG|EN). */
 	struct r600_atom		enable_atom;
 	bool				streamout_enabled;
diff --git a/src/gallium/drivers/radeon/r600_streamout.c b/src/gallium/drivers/radeon/r600_streamout.c
index bc8bf97ef89..815b641579c 100644
--- a/src/gallium/drivers/radeon/r600_streamout.c
+++ b/src/gallium/drivers/radeon/r600_streamout.c
@@ -88,8 +88,7 @@ void r600_streamout_buffers_dirty(struct r600_common_context *rctx)
 		12 + /* flush_vgt_streamout */
 		num_bufs * 11; /* STRMOUT_BUFFER_UPDATE, BUFFER_SIZE */
 
-	begin->num_dw = 12 + /* flush_vgt_streamout */
-			3; /* VGT_STRMOUT_BUFFER_CONFIG */
+	begin->num_dw = 12; /* flush_vgt_streamout */
 
 	if (rctx->chip_class >= SI) {
 		begin->num_dw += num_bufs * 4; /* SET_CONTEXT_REG */
@@ -192,11 +191,6 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
 
 	r600_flush_vgt_streamout(rctx);
 
-	r600_write_context_reg(cs, rctx->chip_class >= EVERGREEN ?
-				       R_028B98_VGT_STRMOUT_BUFFER_CONFIG :
-				       R_028B20_VGT_STRMOUT_BUFFER_EN,
-			       rctx->streamout.enabled_mask);
-
 	for (i = 0; i < rctx->streamout.num_targets; i++) {
 		if (!t[i])
 			continue;
@@ -328,6 +322,12 @@ static void r600_emit_streamout_enable(struct r600_common_context *rctx,
 {
 	r600_write_context_reg(rctx->rings.gfx.cs,
 			       rctx->chip_class >= EVERGREEN ?
+				       R_028B98_VGT_STRMOUT_BUFFER_CONFIG :
+				       R_028B20_VGT_STRMOUT_BUFFER_EN,
+			       rctx->streamout.hw_enabled_mask);
+
+	r600_write_context_reg(rctx->rings.gfx.cs,
+			       rctx->chip_class >= EVERGREEN ?
 				       R_028B94_VGT_STRMOUT_CONFIG :
 				       R_028AB0_VGT_STRMOUT_EN,
 			       S_028B94_STREAMOUT_0_EN(r600_get_strmout_en(rctx)));
@@ -336,9 +336,12 @@ static void r600_emit_streamout_enable(struct r600_common_context *rctx,
 static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable)
 {
 	bool old_strmout_en = r600_get_strmout_en(rctx);
+	unsigned old_hw_enabled_mask = rctx->streamout.hw_enabled_mask;
 
 	rctx->streamout.streamout_enabled = enable;
-	if (old_strmout_en != r600_get_strmout_en(rctx))
+	rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask;
+	if ((old_strmout_en != r600_get_strmout_en(rctx)) ||
+            (old_hw_enabled_mask != rctx->streamout.hw_enabled_mask))
 		rctx->streamout.enable_atom.dirty = true;
 }
 
@@ -365,5 +368,5 @@ void r600_streamout_init(struct r600_common_context *rctx)
 	rctx->b.stream_output_target_destroy = r600_so_target_destroy;
 	rctx->streamout.begin_atom.emit = r600_emit_streamout_begin;
 	rctx->streamout.enable_atom.emit = r600_emit_streamout_enable;
-	rctx->streamout.enable_atom.num_dw = 3;
+	rctx->streamout.enable_atom.num_dw = 6;
 }