Merge remote branch 'origin/master' into pipe-video

36 files changed, 753 insertions, 965 deletions

diff --git a/src/gallium/auxiliary/draw/draw_vs_sse.c b/src/gallium/auxiliary/draw/draw_vs_sse.c
index d55b9b08070..d918579bda4 100644
--- a/src/gallium/auxiliary/draw/draw_vs_sse.c
+++ b/src/gallium/auxiliary/draw/draw_vs_sse.c
@@ -200,7 +200,8 @@ draw_create_vs_sse(struct draw_context *draw,
    return &vs->base;
 
 fail:
-   debug_error("tgsi_emit_sse2() failed, falling back to interpreter\n");
+   if (0)
+      debug_warning("tgsi_emit_sse2() failed, falling back to interpreter\n");
 
    x86_release_func( &vs->sse2_program );
    
diff --git a/src/gallium/drivers/i915/i915_fpc_translate.c b/src/gallium/drivers/i915/i915_fpc_translate.c
index 9e20010c4a1..b145b58be30 100644
--- a/src/gallium/drivers/i915/i915_fpc_translate.c
+++ b/src/gallium/drivers/i915/i915_fpc_translate.c
@@ -1174,15 +1174,24 @@ void
 i915_translate_fragment_program( struct i915_context *i915,
                                  struct i915_fragment_shader *fs)
 {
-   struct i915_fp_compile *p = i915_init_compile(i915, fs);
+   struct i915_fp_compile *p;
    const struct tgsi_token *tokens = fs->state.tokens;
 
-   i915_find_wpos_space(p);
-
 #if 0
    tgsi_dump(tokens, 0);
 #endif
 
+   /* hw doesn't seem to like empty frag programs, even when the depth write
+    * fixup gets emitted below - may that one is fishy, too? */
+   if (fs->info.num_instructions == 1) {
+      i915_use_passthrough_shader(fs);
+
+      return;
+   }
+
+   p = i915_init_compile(i915, fs);
+   i915_find_wpos_space(p);
+
    i915_translate_instructions(p, tokens);
    i915_fixup_depth_write(p);
 
diff --git a/src/gallium/drivers/nv50/SConscript b/src/gallium/drivers/nv50/SConscript
index 84644515ede..3c8a7276b97 100644
--- a/src/gallium/drivers/nv50/SConscript
+++ b/src/gallium/drivers/nv50/SConscript
@@ -5,7 +5,6 @@ env = env.Clone()
 nv50 = env.ConvenienceLibrary(
     target = 'nv50',
     source = [
-        'nv50_buffer.c',
         'nv50_context.c',
         'nv50_draw.c',
         'nv50_formats.c',
@@ -27,9 +26,6 @@ nv50 = env.ConvenienceLibrary(
         'nv50_pc_optimize.c',
         'nv50_pc_regalloc.c',
         'nv50_push.c',
-        'nv50_push2.c',
-        'nv50_fence.c',
-        'nv50_mm.c',
         'nv50_query.c'
     ])
 
diff --git a/src/gallium/drivers/nv50/nv50_formats.c b/src/gallium/drivers/nv50/nv50_formats.c
index 194e826fa66..7946117cf30 100644
--- a/src/gallium/drivers/nv50/nv50_formats.c
+++ b/src/gallium/drivers/nv50/nv50_formats.c
@@ -70,7 +70,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B8G8R8X8_UNORM] = { NV50_SURFACE_FORMAT_X8R8G8B8_UNORM,
-    A_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
+    A_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B8G8R8A8_SRGB] = { NV50_SURFACE_FORMAT_A8R8G8B8_SRGB,
@@ -78,18 +78,18 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_B8G8R8X8_SRGB] = { NV50_SURFACE_FORMAT_X8R8G8B8_SRGB,
-    A_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
+    A_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_B5G6R5_UNORM] = { NV50_SURFACE_FORMAT_R5G6B5_UNORM,
-    B_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 5_6_5, 1),
+    B_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 5_6_5, 1),
     SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B5G5R5A1_UNORM] = { NV50_SURFACE_FORMAT_A1R5G5B5_UNORM,
     B_(C2, C1, C0, C3, UNORM, UNORM, UNORM, UNORM, 1_5_5_5, 1),
     SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
-   [PIPE_FORMAT_B4G4R4A4_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
+   [PIPE_FORMAT_B4G4R4A4_UNORM] = { 0,
     B_(C2, C1, C0, C3, UNORM, UNORM, UNORM, UNORM, 4_4_4_4, 1),
     SAMPLER_VIEW },
 
@@ -104,49 +104,49 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
    /* DEPTH/STENCIL FORMATS */
 
    [PIPE_FORMAT_Z16_UNORM] = { NV50_ZETA_FORMAT_Z16_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 16_ZETA, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, Z16, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24_UNORM_S8_USCALED] = { NV50_ZETA_FORMAT_S8Z24_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 8_24, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, S8Z24, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24X8_UNORM] = { NV50_ZETA_FORMAT_X8Z24_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 8_24, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, X8Z24, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_S8_USCALED_Z24_UNORM] = { NV50_ZETA_FORMAT_Z24S8_UNORM,
-    B_(C1, C1, C1, ONE, UINT, UNORM, UINT, UINT, 24_8, 0),
+    B_(C1, C1, C1, ONE_FLOAT, UINT, UNORM, UINT, UINT, Z24S8, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z32_FLOAT] = { NV50_ZETA_FORMAT_Z32_FLOAT,
-    B_(C0, C0, C0, ONE, FLOAT, UINT, UINT, UINT, 32_ZETA, 0),
+    B_(C0, C0, C0, ONE_FLOAT, FLOAT, UINT, UINT, UINT, Z32, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED] = {
     NV50_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM,
-    B_(C0, C0, C0, ONE, FLOAT, UINT, UINT, UINT, 32_8, 0),
+    B_(C0, C0, C0, ONE_FLOAT, FLOAT, UINT, UINT, UINT, X24S8Z32, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    /* LUMINANCE, ALPHA, INTENSITY */
 
    [PIPE_FORMAT_L8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, C0, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
-    SAMPLER_VIEW },
+    A_(C0, C0, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_L8_SRGB] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, C0, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
-    SAMPLER_VIEW },
+    A_(C0, C0, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_I8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
     A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 8, 0),
-    SAMPLER_VIEW },
+    SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_A8_UNORM] = { NV50_SURFACE_FORMAT_A8_UNORM,
     A_(ZERO, ZERO, ZERO, C0, UNORM, UNORM, UNORM, UNORM, 8, 0),
     SAMPLER_VIEW | RENDER_TARGET },
 
-   [PIPE_FORMAT_L8A8_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
+   [PIPE_FORMAT_L8A8_UNORM] = { 0,
     A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
     SAMPLER_VIEW },
 
@@ -157,7 +157,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
    /* DXT, RGTC */
 
    [PIPE_FORMAT_DXT1_RGB] = { 0,
-    B_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
+    B_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_DXT1_RGBA] = { 0,
@@ -173,19 +173,19 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC1_UNORM] = { 0,
-    B_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, RGTC1, 0),
+    B_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, RGTC1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC1_SNORM] = { 0,
-    B_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, RGTC1, 0),
+    B_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, RGTC1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC2_UNORM] = { 0,
-    B_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, RGTC2, 0),
+    B_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, RGTC2, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC2_SNORM] = { 0,
-    B_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, RGTC2, 0),
+    B_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, RGTC2, 0),
     SAMPLER_VIEW },
 
    /* FLOAT 16 */
@@ -195,15 +195,15 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_FLOAT] = { NV50_SURFACE_FORMAT_R16G16B16X16_FLOAT,
-    A_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16_FLOAT] = { NV50_SURFACE_FORMAT_R16G16_FLOAT,
-    A_(C0, C1, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16_16, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_FLOAT] = { NV50_SURFACE_FORMAT_R16_FLOAT,
-    A_(C0, ZERO, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* FLOAT 32 */
@@ -213,25 +213,25 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32G32B32_FLOAT] = { NV50_SURFACE_FORMAT_R32G32B32X32_FLOAT,
-    A_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32G32_FLOAT] = { NV50_SURFACE_FORMAT_R32G32_FLOAT,
-    A_(C0, C1, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32_FLOAT] = { NV50_SURFACE_FORMAT_R32_FLOAT,
-    A_(C0, ZERO, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* ODD FORMATS */
 
    [PIPE_FORMAT_R11G11B10_FLOAT] = { NV50_SURFACE_FORMAT_B10G11R11_FLOAT,
-    B_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 10_11_11, 0),
+    B_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 10_11_11, 0),
     SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R9G9B9E5_FLOAT] = { 0,
-    B_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, E5_9_9_9, 0),
+    B_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, E5_9_9_9, 0),
     SAMPLER_VIEW },
 
    /* SNORM 32 */
@@ -241,15 +241,15 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32B32_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32_SNORM] = { 0,
-    A_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32_SNORM] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    /* UNORM 32 */
@@ -259,15 +259,15 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32B32_UNORM] = { 0,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32_UNORM] = { 0,
-    A_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32_UNORM] = { 0,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    /* SNORM 16 */
@@ -277,7 +277,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R16G16_SNORM] = { NV50_SURFACE_FORMAT_R16G16_SNORM,
@@ -285,7 +285,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_SNORM] = { NV50_SURFACE_FORMAT_R16_SNORM,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* UNORM 16 */
@@ -295,7 +295,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_UNORM] = { 0,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R16G16_UNORM] = { NV50_SURFACE_FORMAT_R16G16_UNORM,
@@ -303,7 +303,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* SNORM 8 */
@@ -313,15 +313,15 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8_8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R8G8_SNORM] = { NV50_SURFACE_FORMAT_R8G8_SNORM,
-    A_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 8_8, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8_SNORM] = { NV50_SURFACE_FORMAT_R8_SNORM,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 8, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* UNORM 8 */
@@ -335,126 +335,126 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_UNORM] = { NV50_SURFACE_FORMAT_X8B8G8R8_UNORM,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_SRGB] = { NV50_SURFACE_FORMAT_X8B8G8R8_SRGB,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
     SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8_UNORM] = { NV50_SURFACE_FORMAT_R8G8_UNORM,
-    A_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
-   /* SSCALED 32 */
+   /* SSCALED 32 (not integer, data is converted to float !) */
 
    [PIPE_FORMAT_R32G32B32A32_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32B32_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32_SSCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32_SSCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 32 */
 
    [PIPE_FORMAT_R32G32B32A32_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 32_32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32B32_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32_32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32_USCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32_USCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32, 0),
+    VERTEX_BUFFER },
 
    /* SSCALED 16 */
 
    [PIPE_FORMAT_R16G16B16A16_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16B16_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16_SSCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16_16, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16_SSCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 16 */
 
    [PIPE_FORMAT_R16G16B16A16_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 16_16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16B16_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16_16_16, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16_USCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16_16, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16_USCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16, 0),
+    VERTEX_BUFFER },
 
    /* SSCALED 8 */
 
    [PIPE_FORMAT_R8G8B8A8_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8B8_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8_SSCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8_8, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8_SSCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 8 */
 
    [PIPE_FORMAT_R8G8B8A8_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 8_8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8B8_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8_8_8, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8_USCALED] = { 0,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8_8, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8_USCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8, 0),
+    VERTEX_BUFFER },
 };
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 1c1a4201b60..a63f9d8a6d5 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -328,10 +328,15 @@ prog_decl(struct nv50_translation_info *ti,
       }
       break;
    case TGSI_FILE_SYSTEM_VALUE:
+      /* For VP/GP inputs, they are put in s[] after the last normal input.
+       * Let sysval_map reflect the order of the sysvals in s[] and fixup later.
+       */
       switch (decl->Semantic.Name) {
       case TGSI_SEMANTIC_FACE:
          break;
       case TGSI_SEMANTIC_INSTANCEID:
+         ti->p->vp.attrs[2] |= NV50_3D_VP_GP_BUILTIN_ATTR_EN_INSTANCE_ID;
+         ti->sysval_map[first] = 2;
          break;
       case TGSI_SEMANTIC_PRIMID:
          break;
@@ -392,6 +397,18 @@ nv50_vertprog_prepare(struct nv50_translation_info *ti)
       }
    }
 
+   for (i = 0; i < TGSI_SEMANTIC_COUNT; ++i) {
+      switch (ti->sysval_map[i]) {
+      case 2:
+         if (!(ti->p->vp.attrs[2] & NV50_3D_VP_GP_BUILTIN_ATTR_EN_VERTEX_ID))
+            ti->sysval_map[i] = 1;
+         ti->sysval_map[i] = (ti->sysval_map[i] - 1) + num_inputs;
+         break;
+      default:
+         break;
+      }
+   }
+
    if (p->vp.psiz < 0x40)
       p->vp.psiz = p->out[p->vp.psiz].hw;
 
diff --git a/src/gallium/drivers/nv50/nv50_program.h b/src/gallium/drivers/nv50/nv50_program.h
index 8f5b51757d8..993e1691ab7 100644
--- a/src/gallium/drivers/nv50/nv50_program.h
+++ b/src/gallium/drivers/nv50/nv50_program.h
@@ -111,6 +111,7 @@ struct nv50_translation_info {
    ubyte output_file;
    ubyte input_map[PIPE_MAX_SHADER_INPUTS][4];
    ubyte output_map[PIPE_MAX_SHADER_OUTPUTS][4];
+   ubyte sysval_map[TGSI_SEMANTIC_COUNT];
    ubyte interp_mode[PIPE_MAX_SHADER_INPUTS];
    int input_access[PIPE_MAX_SHADER_INPUTS][4];
    int output_access[PIPE_MAX_SHADER_OUTPUTS][4];
diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index 3d6423b2238..980bc369293 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -380,7 +380,7 @@ nv50_tsc_wrap_mode(unsigned wrap)
    }
 }
 
-static void *
+void *
 nv50_sampler_state_create(struct pipe_context *pipe,
                           const struct pipe_sampler_state *cso)
 {
diff --git a/src/gallium/drivers/nv50/nv50_stateobj.h b/src/gallium/drivers/nv50/nv50_stateobj.h
index f4e458b0c05..cf5b92ef1a8 100644
--- a/src/gallium/drivers/nv50/nv50_stateobj.h
+++ b/src/gallium/drivers/nv50/nv50_stateobj.h
@@ -16,35 +16,14 @@
 
 #define SB_DATA(so, u) (so)->state[(so)->size++] = (u)
 
+#include "nv50_stateobj_tex.h"
+
 struct nv50_blend_stateobj {
    struct pipe_blend_state pipe;
    int size;
    uint32_t state[78];
 };
 
-struct nv50_tsc_entry {
-   int id;
-   uint32_t tsc[8];
-};
-
-static INLINE struct nv50_tsc_entry *
-nv50_tsc_entry(void *hwcso)
-{
-   return (struct nv50_tsc_entry *)hwcso;
-}
-
-struct nv50_tic_entry {
-   struct pipe_sampler_view pipe;
-   int id;
-   uint32_t tic[8];
-};
-
-static INLINE struct nv50_tic_entry *
-nv50_tic_entry(struct pipe_sampler_view *view)
-{
-   return (struct nv50_tic_entry *)view;
-}
-
 struct nv50_rasterizer_stateobj {
    struct pipe_rasterizer_state pipe;
    int size;
diff --git a/src/gallium/drivers/nv50/nv50_stateobj_tex.h b/src/gallium/drivers/nv50/nv50_stateobj_tex.h
new file mode 100644
index 00000000000..99548cbdb42
--- /dev/null
+++ b/src/gallium/drivers/nv50/nv50_stateobj_tex.h
@@ -0,0 +1,34 @@
+
+#ifndef __NV50_STATEOBJ_TEX_H__
+#define __NV50_STATEOBJ_TEX_H__
+
+#include "pipe/p_state.h"
+
+struct nv50_tsc_entry {
+   int id;
+   uint32_t tsc[8];
+};
+
+static INLINE struct nv50_tsc_entry *
+nv50_tsc_entry(void *hwcso)
+{
+   return (struct nv50_tsc_entry *)hwcso;
+}
+
+struct nv50_tic_entry {
+   struct pipe_sampler_view pipe;
+   int id;
+   uint32_t tic[8];
+};
+
+static INLINE struct nv50_tic_entry *
+nv50_tic_entry(struct pipe_sampler_view *view)
+{
+   return (struct nv50_tic_entry *)view;
+}
+
+extern void *
+nv50_sampler_state_create(struct pipe_context *,
+                          const struct pipe_sampler_state *);
+
+#endif /* __NV50_STATEOBJ_TEX_H__ */
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index 4456553a868..9192d2e2590 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -27,8 +27,12 @@
 
 #include "util/u_format.h"
 
+#define NV50_TIC_0_SWIZZLE__MASK                      \
+   (NV50_TIC_0_MAPA__MASK | NV50_TIC_0_MAPB__MASK |   \
+    NV50_TIC_0_MAPG__MASK | NV50_TIC_0_MAPR__MASK)
+
 static INLINE uint32_t
-nv50_tic_swizzle(uint32_t tc, unsigned swz)
+nv50_tic_swizzle(uint32_t tc, unsigned swz, boolean tex_int)
 {
    switch (swz) {
    case PIPE_SWIZZLE_RED:
@@ -40,7 +44,7 @@ nv50_tic_swizzle(uint32_t tc, unsigned swz)
    case PIPE_SWIZZLE_ALPHA:
       return (tc & NV50_TIC_0_MAPA__MASK) >> NV50_TIC_0_MAPA__SHIFT;
    case PIPE_SWIZZLE_ONE:
-      return NV50_TIC_MAP_ONE;
+      return tex_int ? NV50_TIC_MAP_ONE_INT : NV50_TIC_MAP_ONE_FLOAT;
    case PIPE_SWIZZLE_ZERO:
    default:
       return NV50_TIC_MAP_ZERO;
@@ -58,6 +62,7 @@ nv50_create_sampler_view(struct pipe_context *pipe,
    uint32_t depth;
    struct nv50_tic_entry *view;
    struct nv50_miptree *mt = nv50_miptree(texture);
+   boolean tex_int;
 
    view = MALLOC_STRUCT(nv50_tic_entry);
    if (!view)
@@ -74,26 +79,28 @@ nv50_create_sampler_view(struct pipe_context *pipe,
 
    tic = &view->tic[0];
 
-   desc = util_format_description(mt->base.base.format);
+   desc = util_format_description(view->pipe.format);
 
    /* TIC[0] */
 
    tic[0] = nv50_format_table[view->pipe.format].tic;
 
-   swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
-   swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
-   swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b);
-   swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a);
+   tex_int = FALSE; /* XXX: integer textures */
+
+   swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r, tex_int);
+   swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g, tex_int);
+   swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b, tex_int);
+   swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a, tex_int);
    tic[0] = (tic[0] & ~NV50_TIC_0_SWIZZLE__MASK) |
       (swz[0] << NV50_TIC_0_MAPR__SHIFT) |
       (swz[1] << NV50_TIC_0_MAPG__SHIFT) |
       (swz[2] << NV50_TIC_0_MAPB__SHIFT) |
       (swz[3] << NV50_TIC_0_MAPA__SHIFT);
 
-   /* tic[1] = mt->base.bo->offset; */
+   tic[1] = /* mt->base.bo->offset; */ 0;
    tic[2] = /* mt->base.bo->offset >> 32 */ 0;
 
-   tic[2] |= 0x10001000 | /* NV50_TIC_2_NO_BORDER */ 0x40000000;
+   tic[2] |= 0x10001000 | NV50_TIC_2_NO_BORDER;
 
    if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
       tic[2] |= NV50_TIC_2_COLORSPACE_SRGB;
@@ -107,6 +114,12 @@ nv50_create_sampler_view(struct pipe_context *pipe,
 
    depth = MAX2(mt->base.base.array_size, mt->base.base.depth0);
 
+   if (mt->base.base.target == PIPE_TEXTURE_1D_ARRAY ||
+       mt->base.base.target == PIPE_TEXTURE_2D_ARRAY) {
+      tic[1] = view->pipe.u.tex.first_layer * mt->layer_stride;
+      depth = view->pipe.u.tex.last_layer - view->pipe.u.tex.first_layer + 1;
+   }
+
    switch (mt->base.base.target) {
    case PIPE_TEXTURE_1D:
       tic[2] |= NV50_TIC_2_TARGET_1D;
@@ -134,7 +147,8 @@ nv50_create_sampler_view(struct pipe_context *pipe,
       tic[2] |= NV50_TIC_2_TARGET_2D_ARRAY;
       break;
    case PIPE_BUFFER:
-      tic[2] |= NV50_TIC_2_TARGET_BUFFER | /* NV50_TIC_2_LINEAR */ (1 << 18);
+      tic[2] |= NV50_TIC_2_TARGET_BUFFER | NV50_TIC_2_LINEAR;
+      break;
    default:
       NOUVEAU_ERR("invalid texture target: %d\n", mt->base.base.target);
       return FALSE;
@@ -178,6 +192,8 @@ nv50_validate_tic(struct nv50_context *nv50, int s)
       res = &nv50_miptree(tic->pipe.texture)->base;
 
       if (tic->id < 0) {
+         uint32_t offset = tic->tic[1];
+
          tic->id = nv50_screen_tic_alloc(nv50->screen, tic);
 
          MARK_RING (chan, 24 + 8, 4);
@@ -206,8 +222,8 @@ nv50_validate_tic(struct nv50_context *nv50, int s)
          OUT_RING  (chan, 0);
          BEGIN_RING_NI(chan, RING_2D(SIFC_DATA), 8);
          OUT_RING  (chan, tic->tic[0]);
-         OUT_RELOCl(chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
-         OUT_RELOC (chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
+         OUT_RELOCl(chan, res->bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+         OUT_RELOC (chan, res->bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
                     NOUVEAU_BO_HIGH | NOUVEAU_BO_OR, tic->tic[2], tic->tic[2]);
          OUT_RINGp (chan, &tic->tic[3], 5);
 
diff --git a/src/gallium/drivers/nv50/nv50_texture.xml.h b/src/gallium/drivers/nv50/nv50_texture.xml.h
index 9f83206516f..e0cbbdf0d7b 100644
--- a/src/gallium/drivers/nv50/nv50_texture.xml.h
+++ b/src/gallium/drivers/nv50/nv50_texture.xml.h
@@ -8,10 +8,10 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
 git clone git://0x04.net/rules-ng-ng
 
 The rules-ng-ng source files this header was generated from are:
-- nv50_texture.xml (   6871 bytes, from 2010-10-03 13:18:37)
-- copyright.xml    (   6498 bytes, from 2010-10-03 13:18:37)
+- nv50_texture.xml (   8377 bytes, from 2011-02-12 12:05:21)
+- copyright.xml    (   6452 bytes, from 2010-11-25 23:28:20)
 
-Copyright (C) 2006-2010 by the following authors:
+Copyright (C) 2006-2011 by the following authors:
 - Artur Huillet <[email protected]> (ahuillet)
 - Ben Skeggs (darktama, darktama_)
 - B. R. <[email protected]> (koala_br)
@@ -22,7 +22,7 @@ Copyright (C) 2006-2010 by the following authors:
 - Dmitry Eremin-Solenikov <[email protected]> (lumag)
 - EdB <[email protected]> (edb_)
 - Erik Waling <[email protected]> (erikwaling)
-- Francisco Jerez <[email protected]> (curro, curro_, currojerez)
+- Francisco Jerez <[email protected]> (curro)
 - imirkin <[email protected]> (imirkin)
 - jb17bsome <[email protected]> (jb17bsome)
 - Jeremy Kolb <[email protected]> (kjeremy)
@@ -75,7 +75,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TIC_MAP_C1						0x00000003
 #define NV50_TIC_MAP_C2						0x00000004
 #define NV50_TIC_MAP_C3						0x00000005
-#define NV50_TIC_MAP_ONE					0x00000007
+#define NV50_TIC_MAP_ONE_INT					0x00000006
+#define NV50_TIC_MAP_ONE_FLOAT					0x00000007
 #define NV50_TIC_TYPE_SNORM					0x00000001
 #define NV50_TIC_TYPE_UNORM					0x00000002
 #define NV50_TIC_TYPE_SINT					0x00000003
@@ -109,7 +110,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TIC_0_TYPE1__SHIFT					9
 #define NV50_TIC_0_TYPE0__MASK					0x000001c0
 #define NV50_TIC_0_TYPE0__SHIFT					6
-#define NV50_TIC_0_SWIZZLE__MASK				0x3ffc0000
 #define NV50_TIC_0_FMT__MASK					0x0000003f
 #define NV50_TIC_0_FMT__SHIFT					0
 #define NV50_TIC_0_FMT_32_32_32_32				0x00000001
@@ -122,16 +122,19 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TIC_0_FMT_8_24					0x0000000d
 #define NV50_TIC_0_FMT_24_8					0x0000000e
 #define NV50_TIC_0_FMT_32					0x0000000f
+#define NV50_TIC_0_FMT_BPTC_FLOAT				0x00000010
+#define NV50_TIC_0_FMT_BPTC_UFLOAT				0x00000011
 #define NV50_TIC_0_FMT_4_4_4_4					0x00000012
 #define NV50_TIC_0_FMT_5_5_5_1					0x00000013
 #define NV50_TIC_0_FMT_1_5_5_5					0x00000014
 #define NV50_TIC_0_FMT_5_6_5					0x00000015
 #define NV50_TIC_0_FMT_6_5_5					0x00000016
+#define NV50_TIC_0_FMT_BPTC					0x00000017
 #define NV50_TIC_0_FMT_8_8					0x00000018
 #define NV50_TIC_0_FMT_16					0x0000001b
 #define NV50_TIC_0_FMT_8					0x0000001d
 #define NV50_TIC_0_FMT_4_4					0x0000001e
-#define NV50_TIC_0_FMT_UNK1F					0x0000001f
+#define NV50_TIC_0_FMT_BITMAP_8X8				0x0000001f
 #define NV50_TIC_0_FMT_E5_9_9_9					0x00000020
 #define NV50_TIC_0_FMT_10_11_11					0x00000021
 #define NV50_TIC_0_FMT_C1_C2_C1_C0				0x00000022
@@ -141,14 +144,24 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TIC_0_FMT_DXT5					0x00000026
 #define NV50_TIC_0_FMT_RGTC1					0x00000027
 #define NV50_TIC_0_FMT_RGTC2					0x00000028
-#define NV50_TIC_0_FMT_24_8_ZETA				0x00000029
-#define NV50_TIC_0_FMT_8_24_ZETA				0x0000002a
-#define NV50_TIC_0_FMT_UNK2C_ZETA				0x0000002c
-#define NV50_TIC_0_FMT_UNK2D_ZETA				0x0000002d
-#define NV50_TIC_0_FMT_UNK2E_ZETA				0x0000002e
-#define NV50_TIC_0_FMT_32_ZETA					0x0000002f
-#define NV50_TIC_0_FMT_32_8_ZETA				0x00000030
-#define NV50_TIC_0_FMT_16_ZETA				0x0000003a
+#define NV50_TIC_0_FMT_Z24S8					0x00000029
+#define NV50_TIC_0_FMT_S8Z24					0x0000002a
+#define NV50_TIC_0_FMT_X8Z24					0x0000002b
+#define NV50_TIC_0_FMT_C8Z24_MS4_CS4				0x0000002c
+#define NV50_TIC_0_FMT_C8Z24_MS8_CS8				0x0000002d
+#define NV50_TIC_0_FMT_C8Z24_MS4_CS12				0x0000002e
+#define NV50_TIC_0_FMT_Z32					0x0000002f
+#define NV50_TIC_0_FMT_X24S8Z32					0x00000030
+#define NV50_TIC_0_FMT_X16C8S8X8Z24_MS4_CS4			0x00000031
+#define NV50_TIC_0_FMT_X16C8S8X8Z24_MS8_CS8			0x00000032
+#define NV50_TIC_0_FMT_X16C8X8Z32_MS4_CS4			0x00000033
+#define NV50_TIC_0_FMT_X16C8X8Z32_MS8_CS8			0x00000034
+#define NV50_TIC_0_FMT_X16C8S8Z32_MS4_CS4			0x00000035
+#define NV50_TIC_0_FMT_X16C8S8Z32_MS8_CS8			0x00000036
+#define NV50_TIC_0_FMT_X16C8S8X8Z24_MS4_CS12			0x00000037
+#define NV50_TIC_0_FMT_X16C8X8Z32_MS4_CS12			0x00000038
+#define NV50_TIC_0_FMT_X16C8S8Z32_MS4_CS12			0x00000039
+#define NV50_TIC_0_FMT_Z16					0x0000003a
 
 #define NV50_TIC_1						0x00000004
 #define NV50_TIC_1_OFFSET_LOW__MASK				0xffffffff
@@ -169,13 +182,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TIC_2_TARGET_BUFFER				0x00018000
 #define NV50_TIC_2_TARGET_RECT					0x0001c000
 #define NV50_TIC_2_TARGET_CUBE_ARRAY				0x00020000
-#define NV50_TIC_2_TILE_MODE_LINEAR				0x00040000
+#define NV50_TIC_2_LINEAR					0x00040000
+#define NV50_TIC_2_TILE_MODE_X__MASK				0x00380000
+#define NV50_TIC_2_TILE_MODE_X__SHIFT				19
 #define NV50_TIC_2_TILE_MODE_Y__MASK				0x01c00000
 #define NV50_TIC_2_TILE_MODE_Y__SHIFT				22
 #define NV50_TIC_2_TILE_MODE_Z__MASK				0x0e000000
 #define NV50_TIC_2_TILE_MODE_Z__SHIFT				25
 #define NV50_TIC_2_2D_UNK0258__MASK				0x30000000
 #define NV50_TIC_2_2D_UNK0258__SHIFT				28
+#define NV50_TIC_2_NO_BORDER					0x40000000
 #define NV50_TIC_2_NORMALIZED_COORDS				0x80000000
 
 #define NV50_TIC_3						0x0000000c
@@ -211,6 +227,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TSC_0_SHADOW_COMPARE_ENABLE			0x00000200
 #define NV50_TSC_0_SHADOW_COMPARE_FUNC__MASK			0x00001c00
 #define NV50_TSC_0_SHADOW_COMPARE_FUNC__SHIFT			10
+#define NV50_TSC_0_BOX_S__MASK					0x0001c000
+#define NV50_TSC_0_BOX_S__SHIFT					14
+#define NV50_TSC_0_BOX_T__MASK					0x000e0000
+#define NV50_TSC_0_BOX_T__SHIFT					17
 #define NV50_TSC_0_ANISOTROPY_MASK__MASK			0x00700000
 #define NV50_TSC_0_ANISOTROPY_MASK__SHIFT			20
 
@@ -234,10 +254,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_TSC_1_LOD_BIAS__SHIFT				12
 
 #define NV50_TSC_2						0x00000008
-#define NV50_TSC_2_MIN_LOD__MASK				0x00000f00
-#define NV50_TSC_2_MIN_LOD__SHIFT				8
-#define NV50_TSC_2_MAX_LOD__MASK				0x00f00000
-#define NV50_TSC_2_MAX_LOD__SHIFT				20
+#define NV50_TSC_2_MIN_LOD__MASK				0x00000fff
+#define NV50_TSC_2_MIN_LOD__SHIFT				0
+#define NV50_TSC_2_MAX_LOD__MASK				0x00fff000
+#define NV50_TSC_2_MAX_LOD__SHIFT				12
 
 #define NV50_TSC_4						0x00000010
 #define NV50_TSC_4_BORDER_COLOR_RED__MASK			0xffffffff
diff --git a/src/gallium/drivers/nv50/nv50_tgsi_to_nc.c b/src/gallium/drivers/nv50/nv50_tgsi_to_nc.c
index 54b78e850ed..1449cb04c69 100644
--- a/src/gallium/drivers/nv50/nv50_tgsi_to_nc.c
+++ b/src/gallium/drivers/nv50/nv50_tgsi_to_nc.c
@@ -1159,6 +1159,13 @@ emit_fetch(struct bld_context *bld, const struct tgsi_full_instruction *insn,
    case TGSI_FILE_PREDICATE:
       res = bld_fetch_global(bld, &bld->pvs[idx][swz]);
       break;
+   case TGSI_FILE_SYSTEM_VALUE:
+      res = new_value(bld->pc, bld->ti->input_file, NV_TYPE_U32);
+      res->reg.id = bld->ti->sysval_map[idx];
+      res = bld_insn_1(bld, NV_OP_LDA, res);
+      res = bld_insn_1(bld, NV_OP_CVT, res);
+      res->reg.type = NV_TYPE_F32;
+      break;
    default:
       NOUVEAU_ERR("illegal/unhandled src reg file: %d\n", src->Register.File);
       abort();
diff --git a/src/gallium/drivers/nvc0/SConscript b/src/gallium/drivers/nvc0/SConscript
index c49e0ddbc52..dbbbf663b33 100644
--- a/src/gallium/drivers/nvc0/SConscript
+++ b/src/gallium/drivers/nvc0/SConscript
@@ -5,7 +5,6 @@ env = env.Clone()
 nvc0 = env.ConvenienceLibrary(
     target = 'nvc0',
     source = [
-        'nvc0_buffer.c',
         'nvc0_context.c',
         'nvc0_draw.c',
         'nvc0_formats.c',
@@ -28,8 +27,6 @@ nvc0 = env.ConvenienceLibrary(
         'nvc0_pc_regalloc.c',
         'nvc0_push.c',
         'nvc0_push2.c',
-        'nvc0_fence.c',
-        'nvc0_mm.c',
         'nvc0_query.c'
     ])
 
diff --git a/src/gallium/drivers/nvc0/nv50_defs.xml.h b/src/gallium/drivers/nvc0/nv50_defs.xml.h
deleted file mode 100644
index 1bf2f802b56..00000000000
--- a/src/gallium/drivers/nvc0/nv50_defs.xml.h
+++ /dev/null
@@ -1,142 +0,0 @@
-#ifndef NV50_DEFS_XML
-#define NV50_DEFS_XML
-
-/* Autogenerated file, DO NOT EDIT manually!
-
-This file was generated by the rules-ng-ng headergen tool in this git repository:
-http://0x04.net/cgit/index.cgi/rules-ng-ng
-git clone git://0x04.net/rules-ng-ng
-
-The rules-ng-ng source files this header was generated from are:
-- nv50_defs.xml (   4482 bytes, from 2010-10-03 13:18:37)
-- copyright.xml (   6498 bytes, from 2010-10-03 13:18:37)
-
-Copyright (C) 2006-2010 by the following authors:
-- Artur Huillet <[email protected]> (ahuillet)
-- Ben Skeggs (darktama, darktama_)
-- B. R. <[email protected]> (koala_br)
-- Carlos Martin <[email protected]> (carlosmn)
-- Christoph Bumiller <[email protected]> (calim, chrisbmr)
-- Dawid Gajownik <[email protected]> (gajownik)
-- Dmitry Baryshkov
-- Dmitry Eremin-Solenikov <[email protected]> (lumag)
-- EdB <[email protected]> (edb_)
-- Erik Waling <[email protected]> (erikwaling)
-- Francisco Jerez <[email protected]> (curro, curro_, currojerez)
-- imirkin <[email protected]> (imirkin)
-- jb17bsome <[email protected]> (jb17bsome)
-- Jeremy Kolb <[email protected]> (kjeremy)
-- Laurent Carlier <[email protected]> (lordheavy)
-- Luca Barbieri <[email protected]> (lb, lb1)
-- Maarten Maathuis <[email protected]> (stillunknown)
-- Marcin Kościelnicki <[email protected]> (mwk, koriakin)
-- Mark Carey <[email protected]> (careym)
-- Matthieu Castet <[email protected]> (mat-c)
-- nvidiaman <[email protected]> (nvidiaman)
-- Patrice Mandin <[email protected]> (pmandin, pmdata)
-- Pekka Paalanen <[email protected]> (pq, ppaalanen)
-- Peter Popov <[email protected]> (ironpeter)
-- Richard Hughes <[email protected]> (hughsient)
-- Rudi Cilibrasi <[email protected]> (cilibrar)
-- Serge Martin
-- Simon Raffeiner
-- Stephane Loeuillet <[email protected]> (leroutier)
-- Stephane Marchesin <[email protected]> (marcheu)
-- sturmflut <[email protected]> (sturmflut)
-- Sylvain Munaut <[email protected]>
-- Victor Stinner <[email protected]> (haypo)
-- Wladmir van der Laan <[email protected]> (miathan6)
-- Younes Manton <[email protected]> (ymanton)
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-
-#define NV50_SURFACE_FORMAT_R32G32B32A32_FLOAT			0x000000c0
-#define NV50_SURFACE_FORMAT_R32G32B32A32_SINT			0x000000c1
-#define NV50_SURFACE_FORMAT_R32G32B32A32_UINT			0x000000c2
-#define NV50_SURFACE_FORMAT_R32G32B32X32_FLOAT			0x000000c3
-#define NV50_SURFACE_FORMAT_R16G16B16A16_UNORM			0x000000c6
-#define NV50_SURFACE_FORMAT_R16G16B16A16_SNORM			0x000000c7
-#define NV50_SURFACE_FORMAT_R16G16B16A16_SINT			0x000000c8
-#define NV50_SURFACE_FORMAT_R16G16B16A16_UINT			0x000000c9
-#define NV50_SURFACE_FORMAT_R16G16B16A16_FLOAT			0x000000ca
-#define NV50_SURFACE_FORMAT_R32G32_FLOAT			0x000000cb
-#define NV50_SURFACE_FORMAT_R32G32_SINT				0x000000cc
-#define NV50_SURFACE_FORMAT_R32G32_UINT				0x000000cd
-#define NV50_SURFACE_FORMAT_R16G16B16X16_FLOAT			0x000000ce
-#define NV50_SURFACE_FORMAT_A8R8G8B8_UNORM			0x000000cf
-#define NV50_SURFACE_FORMAT_A8R8G8B8_SRGB			0x000000d0
-#define NV50_SURFACE_FORMAT_A2B10G10R10_UNORM			0x000000d1
-#define NV50_SURFACE_FORMAT_A2B10G10R10_UINT			0x000000d2
-#define NV50_SURFACE_FORMAT_A8B8G8R8_UNORM			0x000000d5
-#define NV50_SURFACE_FORMAT_A8B8G8R8_SRGB			0x000000d6
-#define NV50_SURFACE_FORMAT_A8B8G8R8_SNORM			0x000000d7
-#define NV50_SURFACE_FORMAT_A8B8G8R8_SINT			0x000000d8
-#define NV50_SURFACE_FORMAT_A8B8G8R8_UINT			0x000000d9
-#define NV50_SURFACE_FORMAT_R16G16_UNORM			0x000000da
-#define NV50_SURFACE_FORMAT_R16G16_SNORM			0x000000db
-#define NV50_SURFACE_FORMAT_R16G16_SINT				0x000000dc
-#define NV50_SURFACE_FORMAT_R16G16_UINT				0x000000dd
-#define NV50_SURFACE_FORMAT_R16G16_FLOAT			0x000000de
-#define NV50_SURFACE_FORMAT_A2R10G10B10_UNORM			0x000000df
-#define NV50_SURFACE_FORMAT_B10G11R11_FLOAT			0x000000e0
-#define NV50_SURFACE_FORMAT_R32_FLOAT				0x000000e5
-#define NV50_SURFACE_FORMAT_X8R8G8B8_UNORM			0x000000e6
-#define NV50_SURFACE_FORMAT_X8R8G8B8_SRGB			0x000000e7
-#define NV50_SURFACE_FORMAT_R5G6B5_UNORM			0x000000e8
-#define NV50_SURFACE_FORMAT_A1R5G5B5_UNORM			0x000000e9
-#define NV50_SURFACE_FORMAT_R8G8_UNORM				0x000000ea
-#define NV50_SURFACE_FORMAT_R8G8_SNORM				0x000000eb
-#define NV50_SURFACE_FORMAT_R8G8_SINT				0x000000ec
-#define NV50_SURFACE_FORMAT_R8G8_UINT				0x000000ed
-#define NV50_SURFACE_FORMAT_R16_UNORM				0x000000ee
-#define NV50_SURFACE_FORMAT_R16_SNORM				0x000000ef
-#define NV50_SURFACE_FORMAT_R16_SINT				0x000000f0
-#define NV50_SURFACE_FORMAT_R16_UINT				0x000000f1
-#define NV50_SURFACE_FORMAT_R16_FLOAT				0x000000f2
-#define NV50_SURFACE_FORMAT_R8_UNORM				0x000000f3
-#define NV50_SURFACE_FORMAT_R8_SNORM				0x000000f4
-#define NV50_SURFACE_FORMAT_R8_SINT				0x000000f5
-#define NV50_SURFACE_FORMAT_R8_UINT				0x000000f6
-#define NV50_SURFACE_FORMAT_A8_UNORM				0x000000f7
-#define NV50_SURFACE_FORMAT_X1R5G5B5_UNORM			0x000000f8
-#define NV50_SURFACE_FORMAT_X8B8G8R8_UNORM			0x000000f9
-#define NV50_SURFACE_FORMAT_X8B8G8R8_SRGB			0x000000fa
-#define NV50_ZETA_FORMAT_Z32_FLOAT				0x0000000a
-#define NV50_ZETA_FORMAT_Z16_UNORM				0x00000013
-#define NV50_ZETA_FORMAT_Z24S8_UNORM				0x00000014
-#define NV50_ZETA_FORMAT_X8Z24_UNORM				0x00000015
-#define NV50_ZETA_FORMAT_S8Z24_UNORM				0x00000016
-#define NV50_ZETA_FORMAT_UNK18					0x00000018
-#define NV50_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM			0x00000019
-#define NV50_ZETA_FORMAT_UNK1D					0x0000001d
-#define NV50_ZETA_FORMAT_UNK1E					0x0000001e
-#define NV50_ZETA_FORMAT_UNK1F					0x0000001f
-#define NV50_QUERY__SIZE					0x00000010
-#define NV50_QUERY_COUNTER					0x00000000
-
-#define NV50_QUERY_RES						0x00000004
-
-#define NV50_QUERY_TIME						0x00000008
-
-
-#endif /* NV50_DEFS_XML */
diff --git a/src/gallium/drivers/nvc0/nv50_texture.xml.h b/src/gallium/drivers/nvc0/nv50_texture.xml.h
deleted file mode 100644
index 9f83206516f..00000000000
--- a/src/gallium/drivers/nvc0/nv50_texture.xml.h
+++ /dev/null
@@ -1,259 +0,0 @@
-#ifndef NV50_TEXTURE_XML
-#define NV50_TEXTURE_XML
-
-/* Autogenerated file, DO NOT EDIT manually!
-
-This file was generated by the rules-ng-ng headergen tool in this git repository:
-http://0x04.net/cgit/index.cgi/rules-ng-ng
-git clone git://0x04.net/rules-ng-ng
-
-The rules-ng-ng source files this header was generated from are:
-- nv50_texture.xml (   6871 bytes, from 2010-10-03 13:18:37)
-- copyright.xml    (   6498 bytes, from 2010-10-03 13:18:37)
-
-Copyright (C) 2006-2010 by the following authors:
-- Artur Huillet <[email protected]> (ahuillet)
-- Ben Skeggs (darktama, darktama_)
-- B. R. <[email protected]> (koala_br)
-- Carlos Martin <[email protected]> (carlosmn)
-- Christoph Bumiller <[email protected]> (calim, chrisbmr)
-- Dawid Gajownik <[email protected]> (gajownik)
-- Dmitry Baryshkov
-- Dmitry Eremin-Solenikov <[email protected]> (lumag)
-- EdB <[email protected]> (edb_)
-- Erik Waling <[email protected]> (erikwaling)
-- Francisco Jerez <[email protected]> (curro, curro_, currojerez)
-- imirkin <[email protected]> (imirkin)
-- jb17bsome <[email protected]> (jb17bsome)
-- Jeremy Kolb <[email protected]> (kjeremy)
-- Laurent Carlier <[email protected]> (lordheavy)
-- Luca Barbieri <[email protected]> (lb, lb1)
-- Maarten Maathuis <[email protected]> (stillunknown)
-- Marcin Kościelnicki <[email protected]> (mwk, koriakin)
-- Mark Carey <[email protected]> (careym)
-- Matthieu Castet <[email protected]> (mat-c)
-- nvidiaman <[email protected]> (nvidiaman)
-- Patrice Mandin <[email protected]> (pmandin, pmdata)
-- Pekka Paalanen <[email protected]> (pq, ppaalanen)
-- Peter Popov <[email protected]> (ironpeter)
-- Richard Hughes <[email protected]> (hughsient)
-- Rudi Cilibrasi <[email protected]> (cilibrar)
-- Serge Martin
-- Simon Raffeiner
-- Stephane Loeuillet <[email protected]> (leroutier)
-- Stephane Marchesin <[email protected]> (marcheu)
-- sturmflut <[email protected]> (sturmflut)
-- Sylvain Munaut <[email protected]>
-- Victor Stinner <[email protected]> (haypo)
-- Wladmir van der Laan <[email protected]> (miathan6)
-- Younes Manton <[email protected]> (ymanton)
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-
-#define NV50_TIC_MAP_ZERO					0x00000000
-#define NV50_TIC_MAP_C0						0x00000002
-#define NV50_TIC_MAP_C1						0x00000003
-#define NV50_TIC_MAP_C2						0x00000004
-#define NV50_TIC_MAP_C3						0x00000005
-#define NV50_TIC_MAP_ONE					0x00000007
-#define NV50_TIC_TYPE_SNORM					0x00000001
-#define NV50_TIC_TYPE_UNORM					0x00000002
-#define NV50_TIC_TYPE_SINT					0x00000003
-#define NV50_TIC_TYPE_UINT					0x00000004
-#define NV50_TIC_TYPE_SSCALED					0x00000005
-#define NV50_TIC_TYPE_USCALED					0x00000006
-#define NV50_TIC_TYPE_FLOAT					0x00000007
-#define NV50_TSC_WRAP_REPEAT					0x00000000
-#define NV50_TSC_WRAP_MIRROR_REPEAT				0x00000001
-#define NV50_TSC_WRAP_CLAMP_TO_EDGE				0x00000002
-#define NV50_TSC_WRAP_CLAMP_TO_BORDER				0x00000003
-#define NV50_TSC_WRAP_CLAMP					0x00000004
-#define NV50_TSC_WRAP_MIRROR_CLAMP_TO_EDGE			0x00000005
-#define NV50_TSC_WRAP_MIRROR_CLAMP_TO_BORDER			0x00000006
-#define NV50_TSC_WRAP_MIRROR_CLAMP				0x00000007
-#define NV50_TIC__SIZE						0x00000020
-#define NV50_TIC_0						0x00000000
-#define NV50_TIC_0_MAPA__MASK					0x38000000
-#define NV50_TIC_0_MAPA__SHIFT					27
-#define NV50_TIC_0_MAPB__MASK					0x07000000
-#define NV50_TIC_0_MAPB__SHIFT					24
-#define NV50_TIC_0_MAPG__MASK					0x00e00000
-#define NV50_TIC_0_MAPG__SHIFT					21
-#define NV50_TIC_0_MAPR__MASK					0x001c0000
-#define NV50_TIC_0_MAPR__SHIFT					18
-#define NV50_TIC_0_TYPE3__MASK					0x00038000
-#define NV50_TIC_0_TYPE3__SHIFT					15
-#define NV50_TIC_0_TYPE2__MASK					0x00007000
-#define NV50_TIC_0_TYPE2__SHIFT					12
-#define NV50_TIC_0_TYPE1__MASK					0x00000e00
-#define NV50_TIC_0_TYPE1__SHIFT					9
-#define NV50_TIC_0_TYPE0__MASK					0x000001c0
-#define NV50_TIC_0_TYPE0__SHIFT					6
-#define NV50_TIC_0_SWIZZLE__MASK				0x3ffc0000
-#define NV50_TIC_0_FMT__MASK					0x0000003f
-#define NV50_TIC_0_FMT__SHIFT					0
-#define NV50_TIC_0_FMT_32_32_32_32				0x00000001
-#define NV50_TIC_0_FMT_16_16_16_16				0x00000003
-#define NV50_TIC_0_FMT_32_32					0x00000004
-#define NV50_TIC_0_FMT_32_8					0x00000005
-#define NV50_TIC_0_FMT_8_8_8_8					0x00000008
-#define NV50_TIC_0_FMT_2_10_10_10				0x00000009
-#define NV50_TIC_0_FMT_16_16					0x0000000c
-#define NV50_TIC_0_FMT_8_24					0x0000000d
-#define NV50_TIC_0_FMT_24_8					0x0000000e
-#define NV50_TIC_0_FMT_32					0x0000000f
-#define NV50_TIC_0_FMT_4_4_4_4					0x00000012
-#define NV50_TIC_0_FMT_5_5_5_1					0x00000013
-#define NV50_TIC_0_FMT_1_5_5_5					0x00000014
-#define NV50_TIC_0_FMT_5_6_5					0x00000015
-#define NV50_TIC_0_FMT_6_5_5					0x00000016
-#define NV50_TIC_0_FMT_8_8					0x00000018
-#define NV50_TIC_0_FMT_16					0x0000001b
-#define NV50_TIC_0_FMT_8					0x0000001d
-#define NV50_TIC_0_FMT_4_4					0x0000001e
-#define NV50_TIC_0_FMT_UNK1F					0x0000001f
-#define NV50_TIC_0_FMT_E5_9_9_9					0x00000020
-#define NV50_TIC_0_FMT_10_11_11					0x00000021
-#define NV50_TIC_0_FMT_C1_C2_C1_C0				0x00000022
-#define NV50_TIC_0_FMT_C2_C1_C0_C1				0x00000023
-#define NV50_TIC_0_FMT_DXT1					0x00000024
-#define NV50_TIC_0_FMT_DXT3					0x00000025
-#define NV50_TIC_0_FMT_DXT5					0x00000026
-#define NV50_TIC_0_FMT_RGTC1					0x00000027
-#define NV50_TIC_0_FMT_RGTC2					0x00000028
-#define NV50_TIC_0_FMT_24_8_ZETA				0x00000029
-#define NV50_TIC_0_FMT_8_24_ZETA				0x0000002a
-#define NV50_TIC_0_FMT_UNK2C_ZETA				0x0000002c
-#define NV50_TIC_0_FMT_UNK2D_ZETA				0x0000002d
-#define NV50_TIC_0_FMT_UNK2E_ZETA				0x0000002e
-#define NV50_TIC_0_FMT_32_ZETA					0x0000002f
-#define NV50_TIC_0_FMT_32_8_ZETA				0x00000030
-#define NV50_TIC_0_FMT_16_ZETA				0x0000003a
-
-#define NV50_TIC_1						0x00000004
-#define NV50_TIC_1_OFFSET_LOW__MASK				0xffffffff
-#define NV50_TIC_1_OFFSET_LOW__SHIFT				0
-
-#define NV50_TIC_2						0x00000008
-#define NV50_TIC_2_OFFSET_HIGH__MASK				0x000000ff
-#define NV50_TIC_2_OFFSET_HIGH__SHIFT				0
-#define NV50_TIC_2_COLORSPACE_SRGB				0x00000400
-#define NV50_TIC_2_TARGET__MASK					0x0003c000
-#define NV50_TIC_2_TARGET__SHIFT				14
-#define NV50_TIC_2_TARGET_1D					0x00000000
-#define NV50_TIC_2_TARGET_2D					0x00004000
-#define NV50_TIC_2_TARGET_3D					0x00008000
-#define NV50_TIC_2_TARGET_CUBE					0x0000c000
-#define NV50_TIC_2_TARGET_1D_ARRAY				0x00010000
-#define NV50_TIC_2_TARGET_2D_ARRAY				0x00014000
-#define NV50_TIC_2_TARGET_BUFFER				0x00018000
-#define NV50_TIC_2_TARGET_RECT					0x0001c000
-#define NV50_TIC_2_TARGET_CUBE_ARRAY				0x00020000
-#define NV50_TIC_2_TILE_MODE_LINEAR				0x00040000
-#define NV50_TIC_2_TILE_MODE_Y__MASK				0x01c00000
-#define NV50_TIC_2_TILE_MODE_Y__SHIFT				22
-#define NV50_TIC_2_TILE_MODE_Z__MASK				0x0e000000
-#define NV50_TIC_2_TILE_MODE_Z__SHIFT				25
-#define NV50_TIC_2_2D_UNK0258__MASK				0x30000000
-#define NV50_TIC_2_2D_UNK0258__SHIFT				28
-#define NV50_TIC_2_NORMALIZED_COORDS				0x80000000
-
-#define NV50_TIC_3						0x0000000c
-#define NV50_TIC_3_PITCH__MASK					0xffffffff
-#define NV50_TIC_3_PITCH__SHIFT					0
-
-#define NV50_TIC_4						0x00000010
-#define NV50_TIC_4_WIDTH__MASK					0xffffffff
-#define NV50_TIC_4_WIDTH__SHIFT					0
-
-#define NV50_TIC_5						0x00000014
-#define NV50_TIC_5_LAST_LEVEL__MASK				0xf0000000
-#define NV50_TIC_5_LAST_LEVEL__SHIFT				28
-#define NV50_TIC_5_DEPTH__MASK					0x0fff0000
-#define NV50_TIC_5_DEPTH__SHIFT					16
-#define NV50_TIC_5_HEIGHT__MASK					0x0000ffff
-#define NV50_TIC_5_HEIGHT__SHIFT				0
-
-#define NV50_TIC_7						0x0000001c
-#define NV50_TIC_7_BASE_LEVEL__MASK				0x0000000f
-#define NV50_TIC_7_BASE_LEVEL__SHIFT				0
-#define NV50_TIC_7_MAX_LEVEL__MASK				0x000000f0
-#define NV50_TIC_7_MAX_LEVEL__SHIFT				4
-
-#define NV50_TSC__SIZE						0x00000020
-#define NV50_TSC_0						0x00000000
-#define NV50_TSC_0_WRAPS__MASK					0x00000007
-#define NV50_TSC_0_WRAPS__SHIFT					0
-#define NV50_TSC_0_WRAPT__MASK					0x00000038
-#define NV50_TSC_0_WRAPT__SHIFT					3
-#define NV50_TSC_0_WRAPR__MASK					0x000001c0
-#define NV50_TSC_0_WRAPR__SHIFT					6
-#define NV50_TSC_0_SHADOW_COMPARE_ENABLE			0x00000200
-#define NV50_TSC_0_SHADOW_COMPARE_FUNC__MASK			0x00001c00
-#define NV50_TSC_0_SHADOW_COMPARE_FUNC__SHIFT			10
-#define NV50_TSC_0_ANISOTROPY_MASK__MASK			0x00700000
-#define NV50_TSC_0_ANISOTROPY_MASK__SHIFT			20
-
-#define NV50_TSC_1						0x00000004
-#define NV50_TSC_1_UNKN_ANISO_15				0x10000000
-#define NV50_TSC_1_UNKN_ANISO_35				0x18000000
-#define NV50_TSC_1_MAGF__MASK					0x00000003
-#define NV50_TSC_1_MAGF__SHIFT					0
-#define NV50_TSC_1_MAGF_NEAREST					0x00000001
-#define NV50_TSC_1_MAGF_LINEAR					0x00000002
-#define NV50_TSC_1_MINF__MASK					0x00000030
-#define NV50_TSC_1_MINF__SHIFT					4
-#define NV50_TSC_1_MINF_NEAREST					0x00000010
-#define NV50_TSC_1_MINF_LINEAR					0x00000020
-#define NV50_TSC_1_MIPF__MASK					0x000000c0
-#define NV50_TSC_1_MIPF__SHIFT					6
-#define NV50_TSC_1_MIPF_NONE					0x00000040
-#define NV50_TSC_1_MIPF_NEAREST					0x00000080
-#define NV50_TSC_1_MIPF_LINEAR					0x000000c0
-#define NV50_TSC_1_LOD_BIAS__MASK				0x01fff000
-#define NV50_TSC_1_LOD_BIAS__SHIFT				12
-
-#define NV50_TSC_2						0x00000008
-#define NV50_TSC_2_MIN_LOD__MASK				0x00000f00
-#define NV50_TSC_2_MIN_LOD__SHIFT				8
-#define NV50_TSC_2_MAX_LOD__MASK				0x00f00000
-#define NV50_TSC_2_MAX_LOD__SHIFT				20
-
-#define NV50_TSC_4						0x00000010
-#define NV50_TSC_4_BORDER_COLOR_RED__MASK			0xffffffff
-#define NV50_TSC_4_BORDER_COLOR_RED__SHIFT			0
-
-#define NV50_TSC_5						0x00000014
-#define NV50_TSC_5_BORDER_COLOR_GREEN__MASK			0xffffffff
-#define NV50_TSC_5_BORDER_COLOR_GREEN__SHIFT			0
-
-#define NV50_TSC_6						0x00000018
-#define NV50_TSC_6_BORDER_COLOR_BLUE__MASK			0xffffffff
-#define NV50_TSC_6_BORDER_COLOR_BLUE__SHIFT			0
-
-#define NV50_TSC_7						0x0000001c
-#define NV50_TSC_7_BORDER_COLOR_ALPHA__MASK			0xffffffff
-#define NV50_TSC_7_BORDER_COLOR_ALPHA__SHIFT			0
-
-
-#endif /* NV50_TEXTURE_XML */
diff --git a/src/gallium/drivers/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nvc0/nvc0_3d.xml.h
index 73a605f94e1..5857f7cee9e 100644
--- a/src/gallium/drivers/nvc0/nvc0_3d.xml.h
+++ b/src/gallium/drivers/nvc0/nvc0_3d.xml.h
@@ -154,8 +154,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define NVC0_3D_LOCAL_SIZE_LOW					0x0000079c
 
-#define NVC0_3D_RT(i0)					       (0x00000800 + 0x20*(i0))
-#define NVC0_3D_RT__ESIZE					0x00000020
+#define NVC0_3D_RT(i0)					       (0x00000800 + 0x40*(i0))
+#define NVC0_3D_RT__ESIZE					0x00000040
 #define NVC0_3D_RT__LEN						0x00000008
 
 #define NVC0_3D_RT_ADDRESS_HIGH(i0)			       (0x00000800 + 0x40*(i0))
@@ -169,11 +169,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NVC0_3D_RT_FORMAT(i0)				       (0x00000810 + 0x40*(i0))
 
 #define NVC0_3D_RT_TILE_MODE(i0)			       (0x00000814 + 0x40*(i0))
-#define NVC0_3D_RT_TILE_MODE_UNK0				0x00000001
+#define NVC0_3D_RT_TILE_MODE_X					0x00000001
 #define NVC0_3D_RT_TILE_MODE_Y__MASK				0x00000070
 #define NVC0_3D_RT_TILE_MODE_Y__SHIFT				4
 #define NVC0_3D_RT_TILE_MODE_Z__MASK				0x00000700
 #define NVC0_3D_RT_TILE_MODE_Z__SHIFT				8
+#define NVC0_3D_RT_TILE_MODE_LINEAR				0x00001000
+#define NVC0_3D_RT_TILE_MODE_UNK16				0x00010000
 
 #define NVC0_3D_RT_ARRAY_MODE(i0)			       (0x00000818 + 0x40*(i0))
 #define NVC0_3D_RT_ARRAY_MODE_LAYERS__MASK			0x0000ffff
@@ -182,6 +184,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define NVC0_3D_RT_LAYER_STRIDE(i0)			       (0x0000081c + 0x40*(i0))
 
+#define NVC0_3D_RT_BASE_LAYER(i0)			       (0x00000820 + 0x40*(i0))
+
+#define NVC0_3D_RT_UNK14(i0)				       (0x00000824 + 0x40*(i0))
+
 #define NVC0_3D_VIEWPORT_SCALE_X(i0)			       (0x00000a00 + 0x20*(i0))
 #define NVC0_3D_VIEWPORT_SCALE_X__ESIZE				0x00000020
 #define NVC0_3D_VIEWPORT_SCALE_X__LEN				0x00000010
@@ -795,8 +801,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define NVC0_3D_POLYGON_OFFSET_UNITS				0x000015bc
 
-#define NVC0_3D_GP_BUILTIN_RESULT_EN				0x000015cc
-#define NVC0_3D_GP_BUILTIN_RESULT_EN_LAYER			0x00010000
+#define NVC0_3D_LAYER						0x000015cc
+#define NVC0_3D_LAYER_IDX__MASK					0x0000ffff
+#define NVC0_3D_LAYER_IDX__SHIFT				0
+#define NVC0_3D_LAYER_USE_GP					0x00010000
 
 #define NVC0_3D_MULTISAMPLE_MODE				0x000015d0
 #define NVC0_3D_MULTISAMPLE_MODE_1X				0x00000000
@@ -917,6 +925,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NVC0_3D_POLYGON_STIPPLE_PATTERN__ESIZE			0x00000004
 #define NVC0_3D_POLYGON_STIPPLE_PATTERN__LEN			0x00000020
 
+#define NVC0_3D_ZETA_BASE_LAYER					0x0000179c
+
 #define NVC0_3D_STRMOUT_UNK1780(i0)			       (0x00001780 + 0x4*(i0))
 #define NVC0_3D_STRMOUT_UNK1780__ESIZE				0x00000004
 #define NVC0_3D_STRMOUT_UNK1780__LEN				0x00000004
diff --git a/src/gallium/drivers/nvc0/nvc0_context.h b/src/gallium/drivers/nvc0/nvc0_context.h
index 114e664fc58..67c5a1287b1 100644
--- a/src/gallium/drivers/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nvc0/nvc0_context.h
@@ -112,7 +112,7 @@ struct nvc0_context {
 
    struct pipe_sampler_view *textures[5][PIPE_MAX_SAMPLERS];
    unsigned num_textures[5];
-   struct nvc0_tsc_entry *samplers[5][PIPE_MAX_SAMPLERS];
+   struct nv50_tsc_entry *samplers[5][PIPE_MAX_SAMPLERS];
    unsigned num_samplers[5];
 
    struct pipe_framebuffer_state framebuffer;
diff --git a/src/gallium/drivers/nvc0/nvc0_formats.c b/src/gallium/drivers/nvc0/nvc0_formats.c
index 5d023573818..454c7440631 100644
--- a/src/gallium/drivers/nvc0/nvc0_formats.c
+++ b/src/gallium/drivers/nvc0/nvc0_formats.c
@@ -21,10 +21,9 @@
  */
 
 #include "nvc0_screen.h"
-#include "nv50_texture.xml.h"
 #include "nvc0_3d.xml.h"
-#include "nv50_defs.xml.h"
-#include "nv50_texture.xml.h"
+#include "nv50/nv50_defs.xml.h"
+#include "nv50/nv50_texture.xml.h"
 #include "pipe/p_defines.h"
 
 #define A_(cr, cg, cb, ca, t0, t1, t2, t3, sz, r)     \
@@ -72,7 +71,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B8G8R8X8_UNORM] = { NV50_SURFACE_FORMAT_X8R8G8B8_UNORM,
-    A_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
+    A_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B8G8R8A8_SRGB] = { NV50_SURFACE_FORMAT_A8R8G8B8_SRGB,
@@ -80,21 +79,29 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_B8G8R8X8_SRGB] = { NV50_SURFACE_FORMAT_X8R8G8B8_SRGB,
-    A_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
+    A_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 1),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_B5G6R5_UNORM] = { NV50_SURFACE_FORMAT_R5G6B5_UNORM,
-    B_(C2, C1, C0, ONE, UNORM, UNORM, UNORM, UNORM, 5_6_5, 1),
+    B_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 5_6_5, 1),
     SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
    [PIPE_FORMAT_B5G5R5A1_UNORM] = { NV50_SURFACE_FORMAT_A1R5G5B5_UNORM,
     B_(C2, C1, C0, C3, UNORM, UNORM, UNORM, UNORM, 1_5_5_5, 1),
     SAMPLER_VIEW | RENDER_TARGET | SCANOUT },
 
-   [PIPE_FORMAT_B4G4R4A4_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
+   [PIPE_FORMAT_B5G5R5X1_UNORM] = { 0,
+    B_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 1_5_5_5, 1),
+    SAMPLER_VIEW | SCANOUT },
+
+   [PIPE_FORMAT_B4G4R4A4_UNORM] = { 0,
     B_(C2, C1, C0, C3, UNORM, UNORM, UNORM, UNORM, 4_4_4_4, 1),
     SAMPLER_VIEW },
 
+   [PIPE_FORMAT_B4G4R4X4_UNORM] = { 0,
+    B_(C2, C1, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 4_4_4_4, 1),
+    SAMPLER_VIEW },
+
    [PIPE_FORMAT_R10G10B10A2_UNORM] = { NV50_SURFACE_FORMAT_A2B10G10R10_UNORM,
     A_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, 2_10_10_10, 0),
     SAMPLER_VIEW | RENDER_TARGET | VERTEX_BUFFER | SCANOUT },
@@ -106,49 +113,57 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
    /* DEPTH/STENCIL FORMATS */
 
    [PIPE_FORMAT_Z16_UNORM] = { NV50_ZETA_FORMAT_Z16_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 16_ZETA, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, Z16, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24_UNORM_S8_USCALED] = { NV50_ZETA_FORMAT_S8Z24_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 8_24, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, S8Z24, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24X8_UNORM] = { NV50_ZETA_FORMAT_X8Z24_UNORM,
-    B_(C0, C0, C0, ONE, UNORM, UINT, UINT, UINT, 8_24, 0),
+    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, X8Z24, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
-   [PIPE_FORMAT_S8_USCALED_Z24_UNORM] = { NV50_ZETA_FORMAT_S8Z24_UNORM,
-    B_(C1, C1, C1, ONE, UINT, UNORM, UINT, UINT, 24_8, 0),
+   [PIPE_FORMAT_S8_USCALED_Z24_UNORM] = { NV50_ZETA_FORMAT_Z24S8_UNORM,
+    B_(C1, C1, C1, ONE_FLOAT, UINT, UNORM, UINT, UINT, Z24S8, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z32_FLOAT] = { NV50_ZETA_FORMAT_Z32_FLOAT,
-    B_(C0, C0, C0, ONE, FLOAT, UINT, UINT, UINT, 32_ZETA, 0),
+    B_(C0, C0, C0, ONE_FLOAT, FLOAT, UINT, UINT, UINT, Z32, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED] = {
     NV50_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM,
-    B_(C0, C0, C0, ONE, FLOAT, UINT, UINT, UINT, 32_8, 0),
+    B_(C0, C0, C0, ONE_FLOAT, FLOAT, UINT, UINT, UINT, X24S8Z32, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    /* LUMINANCE, ALPHA, INTENSITY */
 
    [PIPE_FORMAT_L8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, C0, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
-    SAMPLER_VIEW },
+    A_(C0, C0, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_L8_SRGB] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, C0, C0, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    A_(C0, C0, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_I8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
     A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 8, 0),
-    SAMPLER_VIEW },
+    SAMPLER_VIEW | RENDER_TARGET },
+
+   [PIPE_FORMAT_I16_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
+    A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 16, 0),
+    SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_A8_UNORM] = { NV50_SURFACE_FORMAT_A8_UNORM,
     A_(ZERO, ZERO, ZERO, C0, UNORM, UNORM, UNORM, UNORM, 8, 0),
     SAMPLER_VIEW | RENDER_TARGET },
 
-   [PIPE_FORMAT_L8A8_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
+   [PIPE_FORMAT_A16_UNORM] = { 0,
+    A_(ZERO, ZERO, ZERO, C0, UNORM, UNORM, UNORM, UNORM, 16, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_L8A8_UNORM] = { 0,
     A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
     SAMPLER_VIEW },
 
@@ -156,10 +171,18 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
     SAMPLER_VIEW },
 
+   [PIPE_FORMAT_L16A16_UNORM] = { 0,
+    A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 16_16, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_L4A4_UNORM] = { 0,
+    B_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 4_4, 0),
+    SAMPLER_VIEW },
+
    /* DXT, RGTC */
 
    [PIPE_FORMAT_DXT1_RGB] = { 0,
-    B_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
+    B_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_DXT1_RGBA] = { 0,
@@ -174,20 +197,36 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     B_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, DXT5, 0),
     SAMPLER_VIEW },
 
+   [PIPE_FORMAT_DXT1_SRGB] = { 0,
+    B_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_DXT1_SRGBA] = { 0,
+    B_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, DXT1, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_DXT3_SRGBA] = { 0,
+    B_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, DXT3, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_DXT5_SRGBA] = { 0,
+    B_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, DXT5, 0),
+    SAMPLER_VIEW },
+
    [PIPE_FORMAT_RGTC1_UNORM] = { 0,
-    B_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, RGTC1, 0),
+    B_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, RGTC1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC1_SNORM] = { 0,
-    B_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, RGTC1, 0),
+    B_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, RGTC1, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC2_UNORM] = { 0,
-    B_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, RGTC2, 0),
+    B_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, RGTC2, 0),
     SAMPLER_VIEW },
 
    [PIPE_FORMAT_RGTC2_SNORM] = { 0,
-    B_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, RGTC2, 0),
+    B_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, RGTC2, 0),
     SAMPLER_VIEW },
 
    /* FLOAT 16 */
@@ -197,15 +236,15 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_FLOAT] = { NV50_SURFACE_FORMAT_R16G16B16X16_FLOAT,
-    A_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16_FLOAT] = { NV50_SURFACE_FORMAT_R16G16_FLOAT,
-    A_(C0, C1, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16_16, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_FLOAT] = { NV50_SURFACE_FORMAT_R16_FLOAT,
-    A_(C0, ZERO, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* FLOAT 32 */
@@ -215,61 +254,61 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32G32B32_FLOAT] = { NV50_SURFACE_FORMAT_R32G32B32X32_FLOAT,
-    A_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32G32_FLOAT] = { NV50_SURFACE_FORMAT_R32G32_FLOAT,
-    A_(C0, C1, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R32_FLOAT] = { NV50_SURFACE_FORMAT_R32_FLOAT,
-    A_(C0, ZERO, ZERO, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* ODD FORMATS */
 
    [PIPE_FORMAT_R11G11B10_FLOAT] = { NV50_SURFACE_FORMAT_B10G11R11_FLOAT,
-    B_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, 10_11_11, 0),
-    SAMPLER_VIEW | RENDER_TARGET },
+    B_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 10_11_11, 0),
+    SAMPLER_VIEW | RENDER_TARGET | VERTEX_BUFFER },
 
    [PIPE_FORMAT_R9G9B9E5_FLOAT] = { 0,
-    B_(C0, C1, C2, ONE, FLOAT, FLOAT, FLOAT, FLOAT, E5_9_9_9, 0),
+    B_(C0, C1, C2, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, E5_9_9_9, 0),
     SAMPLER_VIEW },
 
    /* SNORM 32 */
 
    [PIPE_FORMAT_R32G32B32A32_SNORM] = { 0,
-    A_(C0, C1, C2, C3, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32_32, 0),
+    A_(C0, C1, C2, C3, SNORM, SNORM, SNORM, SNORM, 32_32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32B32_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32_SNORM] = { 0,
-    A_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32_SNORM] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    /* UNORM 32 */
 
    [PIPE_FORMAT_R32G32B32A32_UNORM] = { 0,
-    A_(C0, C1, C2, C3, FLOAT, FLOAT, FLOAT, FLOAT, 32_32_32_32, 0),
+    A_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, 32_32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32B32_UNORM] = { 0,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 32_32_32, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32_32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32G32_UNORM] = { 0,
-    A_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 32_32, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32_32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R32_UNORM] = { 0,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 32, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 32, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    /* SNORM 16 */
@@ -279,7 +318,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R16G16_SNORM] = { NV50_SURFACE_FORMAT_R16G16_SNORM,
@@ -287,7 +326,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_SNORM] = { NV50_SURFACE_FORMAT_R16_SNORM,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* UNORM 16 */
@@ -297,7 +336,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16G16B16_UNORM] = { 0,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 16_16_16, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 16_16_16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R16G16_UNORM] = { NV50_SURFACE_FORMAT_R16G16_UNORM,
@@ -305,7 +344,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R16_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 16, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 16, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* SNORM 8 */
@@ -315,15 +354,15 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_SNORM] = { 0,
-    A_(C0, C1, C2, ONE, SNORM, SNORM, SNORM, SNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8_8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW },
 
    [PIPE_FORMAT_R8G8_SNORM] = { NV50_SURFACE_FORMAT_R8G8_SNORM,
-    A_(C0, C1, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 8_8, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8_SNORM] = { NV50_SURFACE_FORMAT_R8_SNORM,
-    A_(C0, ZERO, ZERO, ONE, SNORM, SNORM, SNORM, SNORM, 8, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    /* UNORM 8 */
@@ -337,126 +376,148 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] =
     SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_UNORM] = { NV50_SURFACE_FORMAT_X8B8G8R8_UNORM,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8B8_SRGB] = { NV50_SURFACE_FORMAT_X8B8G8R8_SRGB,
-    A_(C0, C1, C2, ONE, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
+    A_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8_8, 0),
     SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8G8_UNORM] = { NV50_SURFACE_FORMAT_R8G8_UNORM,
-    A_(C0, C1, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
+    A_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8_8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
    [PIPE_FORMAT_R8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM,
-    A_(C0, ZERO, ZERO, ONE, UNORM, UNORM, UNORM, UNORM, 8, 0),
+    A_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0),
     VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET },
 
-   /* SSCALED 32 */
+   /* SSCALED 32 (not integer, converted to float on fetch !) */
 
-   [PIPE_FORMAT_R32G32B32A32_SSCALED] = { NV50_SURFACE_FORMAT_R32G32B32A32_SINT,
+   [PIPE_FORMAT_R32G32B32A32_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32B32_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32_32_32, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R32G32_SSCALED] = { NV50_SURFACE_FORMAT_R32G32_SINT,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R32G32_SSCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32_SSCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 32, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 32 */
 
-   [PIPE_FORMAT_R32G32B32A32_USCALED] = { NV50_SURFACE_FORMAT_R32G32B32A32_UINT,
+   [PIPE_FORMAT_R32G32B32A32_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 32_32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32G32B32_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 32_32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32_32_32, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R32G32_USCALED] = { NV50_SURFACE_FORMAT_R32G32_UINT,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 32_32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R32G32_USCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32_32, 0),
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R32_USCALED] = { 0,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 32, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 32, 0),
+    VERTEX_BUFFER },
 
    /* SSCALED 16 */
 
-   [PIPE_FORMAT_R16G16B16A16_SSCALED] = { NV50_SURFACE_FORMAT_R16G16B16A16_SINT,
+   [PIPE_FORMAT_R16G16B16A16_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16B16_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16_16_16, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R16G16_SSCALED] = { NV50_SURFACE_FORMAT_R16G16_SINT,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R16G16_SSCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16_16, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R16_SSCALED] = { NV50_SURFACE_FORMAT_R16_SINT,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R16_SSCALED] = { 0,
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 16, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 16 */
 
-   [PIPE_FORMAT_R16G16B16A16_USCALED] = { NV50_SURFACE_FORMAT_R16G16B16A16_UINT,
+   [PIPE_FORMAT_R16G16B16A16_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 16_16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R16G16B16_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 16_16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16_16_16, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R16G16_USCALED] = { NV50_SURFACE_FORMAT_R16G16_UINT,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 16_16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R16G16_USCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16_16, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R16_USCALED] = { NV50_SURFACE_FORMAT_R16_UINT,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 16, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R16_USCALED] = { 0,
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 16, 0),
+    VERTEX_BUFFER },
 
    /* SSCALED 8 */
 
-   [PIPE_FORMAT_R8G8B8A8_SSCALED] = { NV50_SURFACE_FORMAT_A8B8G8R8_SINT,
+   [PIPE_FORMAT_R8G8B8A8_SSCALED] = { 0,
     A_(C0, C1, C2, C3, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8B8_SSCALED] = { 0,
-    A_(C0, C1, C2, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8_8_8, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R8G8_SSCALED] = { NV50_SURFACE_FORMAT_R8G8_SINT,
-    A_(C0, C1, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R8G8_SSCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8_8, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R8_SSCALED] = { NV50_SURFACE_FORMAT_R8_SINT,
-    A_(C0, ZERO, ZERO, ONE, SSCALED, SSCALED, SSCALED, SSCALED, 8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R8_SSCALED] = { 0,
+    A_(C0, ZERO, ZERO, ONE_FLOAT, SSCALED, SSCALED, SSCALED, SSCALED, 8, 0),
+    VERTEX_BUFFER },
 
    /* USCALED 8 */
 
-   [PIPE_FORMAT_R8G8B8A8_USCALED] = { NV50_SURFACE_FORMAT_A8B8G8R8_UINT,
+   [PIPE_FORMAT_R8G8B8A8_USCALED] = { 0,
     A_(C0, C1, C2, C3, USCALED, USCALED, USCALED, USCALED, 8_8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    VERTEX_BUFFER },
 
    [PIPE_FORMAT_R8G8B8_USCALED] = { 0,
-    A_(C0, C1, C2, ONE, USCALED, USCALED, USCALED, USCALED, 8_8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+    A_(C0, C1, C2, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8_8_8, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R8G8_USCALED] = { NV50_SURFACE_FORMAT_R8G8_UINT,
-    A_(C0, C1, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 8_8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R8G8_USCALED] = { 0,
+    A_(C0, C1, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8_8, 0),
+    VERTEX_BUFFER },
 
-   [PIPE_FORMAT_R8_USCALED] = { NV50_SURFACE_FORMAT_R8_UINT,
-    A_(C0, ZERO, ZERO, ONE, USCALED, USCALED, USCALED, USCALED, 8, 0),
-    VERTEX_BUFFER | SAMPLER_VIEW },
+   [PIPE_FORMAT_R8_USCALED] = { 0,
+    A_(C0, ZERO, ZERO, ONE_FLOAT, USCALED, USCALED, USCALED, USCALED, 8, 0),
+    VERTEX_BUFFER },
+
+   /* OTHER FORMATS */
+
+   [PIPE_FORMAT_R8G8_B8G8_UNORM] = { 0,
+    B_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, C1_C2_C1_C0, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_G8R8_G8B8_UNORM] = { 0,
+    B_(C0, C1, C2, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, C2_C1_C0_C1, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_R8SG8SB8UX8U_NORM] = { 0,
+    B_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, 8_8_8_8, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_R5SG5SB6U_NORM] = { 0,
+    B_(C0, C1, C2, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, 6_5_5, 0),
+    SAMPLER_VIEW },
+
+   [PIPE_FORMAT_R1_UNORM] = { 0,
+    B_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, BITMAP_8X8, 0),
+    SAMPLER_VIEW },
 };
diff --git a/src/gallium/drivers/nvc0/nvc0_miptree.c b/src/gallium/drivers/nvc0/nvc0_miptree.c
index ea3ed9e0225..db9117c3ff1 100644
--- a/src/gallium/drivers/nvc0/nvc0_miptree.c
+++ b/src/gallium/drivers/nvc0/nvc0_miptree.c
@@ -57,17 +57,25 @@ get_tile_dims(unsigned nx, unsigned ny, unsigned nz)
    return tile_mode | 0x100;
 }
 
-static INLINE unsigned
-calc_zslice_offset(uint32_t tile_mode, unsigned z, unsigned pitch, unsigned nbh)
+uint32_t
+nvc0_miptree_zslice_offset(struct nvc0_miptree *mt, unsigned l, unsigned z)
 {
-   unsigned tile_h = NVC0_TILE_HEIGHT(tile_mode);
-   unsigned tile_d_shift = NVC0_TILE_DIM_SHIFT(tile_mode, 2);
+   unsigned nblocksy; /* height of texture level aligned to tile height */
+
+   unsigned stride_2d; /* to next slice within a 3D tile */
+   unsigned stride_3d; /* to slice in the next (in z direction !) 3D tile */
+
+   unsigned tile_d_shift = NVC0_TILE_DIM_SHIFT(mt->level[l].tile_mode, 2);
    unsigned tile_d = 1 << tile_d_shift;
 
-   /* stride_2d == to next slice within this volume tile */
-   /* stride_3d == size (in bytes) of a volume tile */
-   unsigned stride_2d = tile_h * NVC0_TILE_PITCH(tile_mode);
-   unsigned stride_3d = tile_d * align(nbh, tile_h) * pitch;
+   nblocksy = util_format_get_nblocksy(mt->base.base.format,
+                                       u_minify(mt->base.base.height0, l));
+
+   nblocksy = align(nblocksy, NVC0_TILE_HEIGHT(mt->level[l].tile_mode));
+
+   stride_2d = NVC0_TILE_SIZE_2D(mt->level[l].tile_mode);
+
+   stride_3d = (nblocksy * mt->level[l].pitch) << tile_d_shift;
 
    return (z & (tile_d - 1)) * stride_2d + (z >> tile_d_shift) * stride_3d;
 }
@@ -298,21 +306,6 @@ nvc0_miptree_surface_new(struct pipe_context *pipe,
    ps->width = ns->width;
    ps->height = ns->height;
 
-   if (mt->layout_3d) {
-      unsigned zslice = ps->u.tex.first_layer;
-
-      /* TODO: re-layout the texture to use only depth 1 tiles in this case: */
-      if (ns->depth > 1 && (zslice & (NVC0_TILE_DEPTH(lvl->tile_mode) - 1)))
-         NOUVEAU_ERR("Creating unsupported 3D surface of slices [%u:%u].\n",
-                     zslice, ps->u.tex.last_layer);
-
-      ns->offset += calc_zslice_offset(lvl->tile_mode, zslice, lvl->pitch,
-                                       util_format_get_nblocksy(pt->format,
-                                                                ns->height));
-   } else {
-      ns->offset += mt->layer_stride * ps->u.tex.first_layer;
-   }
-
    return ps;
 }
 
diff --git a/src/gallium/drivers/nvc0/nvc0_resource.h b/src/gallium/drivers/nvc0/nvc0_resource.h
index 7821db51b72..f1c445b5152 100644
--- a/src/gallium/drivers/nvc0/nvc0_resource.h
+++ b/src/gallium/drivers/nvc0/nvc0_resource.h
@@ -69,4 +69,7 @@ nvc0_miptree_surface_new(struct pipe_context *,
 void
 nvc0_miptree_surface_del(struct pipe_context *, struct pipe_surface *);
 
+uint32_t
+nvc0_miptree_zslice_offset(struct nvc0_miptree *, unsigned l, unsigned z);
+
 #endif
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c
index 923bb83e8a3..d430be92c51 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -582,7 +582,7 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
    OUT_RING  (chan, 1);
    BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
    OUT_RING  (chan, 0x40);
-   BEGIN_RING(chan, RING_3D(GP_BUILTIN_RESULT_EN), 1);
+   BEGIN_RING(chan, RING_3D(LAYER), 1);
    OUT_RING  (chan, 0);
    BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
    OUT_RING  (chan, 0x30);
@@ -651,7 +651,7 @@ nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
    screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
 
    if (screen->tic.entries[i])
-      nvc0_tic_entry(screen->tic.entries[i])->id = -1;
+      nv50_tic_entry(screen->tic.entries[i])->id = -1;
 
    screen->tic.entries[i] = entry;
    return i;
@@ -668,7 +668,7 @@ nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
    screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
 
    if (screen->tsc.entries[i])
-      nvc0_tsc_entry(screen->tsc.entries[i])->id = -1;
+      nv50_tsc_entry(screen->tsc.entries[i])->id = -1;
 
    screen->tsc.entries[i] = entry;
    return i;
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.h b/src/gallium/drivers/nvc0/nvc0_screen.h
index d8b8c5e3dc8..81f404ada83 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.h
+++ b/src/gallium/drivers/nvc0/nvc0_screen.h
@@ -114,21 +114,21 @@ struct nvc0_format {
 extern const struct nvc0_format nvc0_format_table[];
 
 static INLINE void
-nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nvc0_tic_entry *tic)
+nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
 {
    if (tic->id >= 0)
       screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
 }
 
 static INLINE void
-nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nvc0_tsc_entry *tsc)
+nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
 {
    if (tsc->id >= 0)
       screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
 }
 
 static INLINE void
-nvc0_screen_tic_free(struct nvc0_screen *screen, struct nvc0_tic_entry *tic)
+nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
 {
    if (tic->id >= 0) {
       screen->tic.entries[tic->id] = NULL;
@@ -137,7 +137,7 @@ nvc0_screen_tic_free(struct nvc0_screen *screen, struct nvc0_tic_entry *tic)
 }
 
 static INLINE void
-nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nvc0_tsc_entry *tsc)
+nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
 {
    if (tsc->id >= 0) {
       screen->tsc.entries[tsc->id] = NULL;
diff --git a/src/gallium/drivers/nvc0/nvc0_state.c b/src/gallium/drivers/nvc0/nvc0_state.c
index ee4680efeca..f230292316f 100644
--- a/src/gallium/drivers/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nvc0/nvc0_state.c
@@ -30,7 +30,7 @@
 #include "nvc0_context.h"
 
 #include "nvc0_3d.xml.h"
-#include "nv50_texture.xml.h"
+#include "nv50/nv50_texture.xml.h"
 
 #include "nouveau/nouveau_gldefs.h"
 
@@ -361,90 +361,6 @@ nv50_tsc_wrap_mode(unsigned wrap)
    }
 }
 
-static void *
-nvc0_sampler_state_create(struct pipe_context *pipe,
-                          const struct pipe_sampler_state *cso)
-{
-   struct nvc0_tsc_entry *so = CALLOC_STRUCT(nvc0_tsc_entry);
-   float f[2];
-
-   so->id = -1;
-
-   so->tsc[0] = (0x00026000 |
-                 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
-                 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
-                 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
-
-   switch (cso->mag_img_filter) {
-   case PIPE_TEX_FILTER_LINEAR:
-      so->tsc[1] |= NV50_TSC_1_MAGF_LINEAR;
-      break;
-   case PIPE_TEX_FILTER_NEAREST:
-   default:
-      so->tsc[1] |= NV50_TSC_1_MAGF_NEAREST;
-      break;
-   }
-
-   switch (cso->min_img_filter) {
-   case PIPE_TEX_FILTER_LINEAR:
-      so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
-      break;
-   case PIPE_TEX_FILTER_NEAREST:
-   default:
-      so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
-      break;
-   }
-
-   switch (cso->min_mip_filter) {
-   case PIPE_TEX_MIPFILTER_LINEAR:
-      so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
-      break;
-   case PIPE_TEX_MIPFILTER_NEAREST:
-      so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
-      break;
-   case PIPE_TEX_MIPFILTER_NONE:
-   default:
-      so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
-      break;
-   }
-
-   if (cso->max_anisotropy >= 16)
-      so->tsc[0] |= (7 << 20);
-   else
-   if (cso->max_anisotropy >= 12)
-      so->tsc[0] |= (6 << 20);
-   else {
-      so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
-
-      if (cso->max_anisotropy >= 4)
-         so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
-      else
-      if (cso->max_anisotropy >= 2)
-         so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
-   }
-
-   if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
-      /* NOTE: must be deactivated for non-shadow textures */
-      so->tsc[0] |= (1 << 9);
-      so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
-   }
-
-   f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
-   so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
-
-   f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
-   f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
-   so->tsc[2] |=
-      (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
-
-   so->tsc[4] = fui(cso->border_color[0]);
-   so->tsc[5] = fui(cso->border_color[1]);
-   so->tsc[6] = fui(cso->border_color[2]);
-   so->tsc[7] = fui(cso->border_color[3]);
-
-   return (void *)so;
-}
-
 static void
 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 {
@@ -455,7 +371,7 @@ nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
             nvc0_context(pipe)->samplers[s][i] = NULL;
 
-   nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nvc0_tsc_entry(hwcso));
+   nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 
    FREE(hwcso);
 }
@@ -467,9 +383,9 @@ nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
    unsigned i;
 
    for (i = 0; i < nr; ++i) {
-      struct nvc0_tsc_entry *old = nvc0->samplers[s][i];
+      struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 
-      nvc0->samplers[s][i] = nvc0_tsc_entry(hwcso[i]);
+      nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
       if (old)
          nvc0_screen_tsc_unlock(nvc0->screen, old);
    }
@@ -507,9 +423,9 @@ nvc0_sampler_view_destroy(struct pipe_context *pipe,
 {
    pipe_resource_reference(&view->texture, NULL);
 
-   nvc0_screen_tic_free(nvc0_context(pipe)->screen, nvc0_tic_entry(view));
+   nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 
-   FREE(nvc0_tic_entry(view));
+   FREE(nv50_tic_entry(view));
 }
 
 static INLINE void
@@ -520,7 +436,7 @@ nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
    unsigned i;
 
    for (i = 0; i < nr; ++i) {
-      struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
+      struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
       if (old)
          nvc0_screen_tic_unlock(nvc0->screen, old);
 
@@ -528,7 +444,7 @@ nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
    }
 
    for (i = nr; i < nvc0->num_textures[s]; ++i) {
-      struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
+      struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
       if (!old)
          continue;
       nvc0_screen_tic_unlock(nvc0->screen, old);
@@ -890,7 +806,7 @@ nvc0_init_state_functions(struct nvc0_context *nvc0)
    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 
-   pipe->create_sampler_state = nvc0_sampler_state_create;
+   pipe->create_sampler_state = nv50_sampler_state_create;
    pipe->delete_sampler_state = nvc0_sampler_state_delete;
    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
diff --git a/src/gallium/drivers/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nvc0/nvc0_state_validate.c
index ab8119a3bbb..6fd880829e4 100644
--- a/src/gallium/drivers/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nvc0/nvc0_state_validate.c
@@ -76,7 +76,7 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
         struct nouveau_bo *bo = mt->base.bo;
         uint32_t offset = sf->offset;
 
-        BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(i)), 8);
+        BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(i)), 9);
         OUT_RELOCh(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
         OUT_RELOCl(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
         OUT_RING  (chan, sf->width);
@@ -84,8 +84,9 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
         OUT_RING  (chan, nvc0_format_table[sf->base.format].rt);
         OUT_RING  (chan, (mt->layout_3d << 16) |
                    mt->level[sf->base.u.tex.level].tile_mode);
-        OUT_RING  (chan, sf->depth);
+        OUT_RING  (chan, sf->base.u.tex.first_layer + sf->depth);
         OUT_RING  (chan, mt->layer_stride >> 2);
+        OUT_RING  (chan, sf->base.u.tex.first_layer);
 
         if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
            serialize = TRUE;
@@ -115,7 +116,10 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
         BEGIN_RING(chan, RING_3D(ZETA_HORIZ), 3);
         OUT_RING  (chan, sf->width);
         OUT_RING  (chan, sf->height);
-        OUT_RING  (chan, (unk << 16) | sf->depth);
+        OUT_RING  (chan, (unk << 16) |
+                   (sf->base.u.tex.first_layer + sf->depth));
+        BEGIN_RING(chan, RING_3D(ZETA_BASE_LAYER), 1);
+        OUT_RING  (chan, sf->base.u.tex.first_layer);
 
         if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
            serialize = TRUE;
diff --git a/src/gallium/drivers/nvc0/nvc0_stateobj.h b/src/gallium/drivers/nvc0/nvc0_stateobj.h
index 57566128ab5..8222f9375ee 100644
--- a/src/gallium/drivers/nvc0/nvc0_stateobj.h
+++ b/src/gallium/drivers/nvc0/nvc0_stateobj.h
@@ -14,35 +14,14 @@
 
 #define SB_DATA(so, u) (so)->state[(so)->size++] = (u)
 
+#include "nv50/nv50_stateobj_tex.h"
+
 struct nvc0_blend_stateobj {
    struct pipe_blend_state pipe;
    int size;
    uint32_t state[72];
 };
 
-struct nvc0_tsc_entry {
-   int id;
-   uint32_t tsc[8];
-};
-
-static INLINE struct nvc0_tsc_entry *
-nvc0_tsc_entry(void *hwcso)
-{
-   return (struct nvc0_tsc_entry *)hwcso;
-}
-
-struct nvc0_tic_entry {
-   struct pipe_sampler_view pipe;
-   int id;
-   uint32_t tic[8];
-};
-
-static INLINE struct nvc0_tic_entry *
-nvc0_tic_entry(struct pipe_sampler_view *view)
-{
-   return (struct nvc0_tic_entry *)view;
-}
-
 struct nvc0_rasterizer_stateobj {
    struct pipe_rasterizer_state pipe;
    int size;
diff --git a/src/gallium/drivers/nvc0/nvc0_surface.c b/src/gallium/drivers/nvc0/nvc0_surface.c
index a4b2b948123..17fc51b8aac 100644
--- a/src/gallium/drivers/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nvc0/nvc0_surface.c
@@ -30,8 +30,9 @@
 
 #include "nvc0_context.h"
 #include "nvc0_resource.h"
+#include "nvc0_transfer.h"
 
-#include "nv50_defs.xml.h"
+#include "nv50/nv50_defs.xml.h"
 
 #define NVC0_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL
 
@@ -91,14 +92,18 @@ nvc0_2d_texture_set(struct nouveau_channel *chan, int dst,
 
    width = u_minify(mt->base.base.width0, level);
    height = u_minify(mt->base.base.height0, level);
+   depth = u_minify(mt->base.base.depth0, level);
+
+   /* layer has to be < depth, and depth > tile depth / 2 */
 
-   offset = mt->level[level].offset;
    if (!mt->layout_3d) {
       offset += mt->layer_stride * layer;
+      layer = 0;
       depth = 1;
+   } else
+   if (!dst) {
+      offset += nvc0_miptree_zslice_offset(mt, level, layer);
       layer = 0;
-   } else {
-      depth = u_minify(mt->base.base.depth0, level);
    }
 
    if (!(bo->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK)) {
@@ -182,6 +187,43 @@ nvc0_2d_texture_do_copy(struct nouveau_channel *chan,
 }
 
 static void
+nvc0_setup_m2mf_rect(struct nvc0_m2mf_rect *rect,
+                     struct pipe_resource *restrict res, unsigned l,
+                     unsigned x, unsigned y, unsigned z)
+{
+   struct nvc0_miptree *mt = nvc0_miptree(res);
+   const unsigned w = u_minify(res->width0, l);
+   const unsigned h = u_minify(res->height0, l);
+
+   rect->bo = mt->base.bo;
+   rect->domain = mt->base.domain;
+   rect->base = mt->level[l].offset;
+   rect->pitch = mt->level[l].pitch;
+   if (util_format_is_plain(res->format)) {
+      rect->width = w;
+      rect->height = h;
+      rect->x = x;
+      rect->y = y;
+   } else {
+      rect->width = util_format_get_nblocksx(res->format, w);
+      rect->height = util_format_get_nblocksy(res->format, h);
+      rect->x = util_format_get_nblocksx(res->format, x);
+      rect->y = util_format_get_nblocksy(res->format, y);
+   }
+   rect->tile_mode = mt->level[l].tile_mode;
+   rect->cpp = util_format_get_blocksize(res->format);
+
+   if (mt->layout_3d) {
+      rect->z = z;
+      rect->depth = u_minify(res->depth0, l);
+   } else {
+      rect->base += z * mt->layer_stride;
+      rect->z = 0;
+      rect->depth = 1;
+   }
+}
+
+static void
 nvc0_resource_copy_region(struct pipe_context *pipe,
                           struct pipe_resource *dst, unsigned dst_level,
                           unsigned dstx, unsigned dsty, unsigned dstz,
@@ -192,9 +234,36 @@ nvc0_resource_copy_region(struct pipe_context *pipe,
    int ret;
    unsigned dst_layer = dstz, src_layer = src_box->z;
 
-   assert((src->format == dst->format) ||
-          (nvc0_2d_format_faithful(src->format) &&
-           nvc0_2d_format_faithful(dst->format)));
+   nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
+
+   if (src->format == dst->format) {
+      struct nvc0_m2mf_rect drect, srect;
+      unsigned i;
+      unsigned nx = util_format_get_nblocksx(src->format, src_box->width);
+      unsigned ny = util_format_get_nblocksx(src->format, src_box->height);
+
+      nvc0_setup_m2mf_rect(&drect, dst, dst_level, dstx, dsty, dstz);
+      nvc0_setup_m2mf_rect(&srect, src, src_level,
+                           src_box->x, src_box->y, src_box->z);
+
+      for (i = 0; i < src_box->depth; ++i) {
+         nvc0_m2mf_transfer_rect(&screen->base.base, &drect, &srect, nx, ny);
+
+         if (nvc0_miptree(dst)->layout_3d)
+            drect.z++;
+         else
+            drect.base += nvc0_miptree(dst)->layer_stride;
+
+         if (nvc0_miptree(src)->layout_3d)
+            srect.z++;
+         else
+            srect.base += nvc0_miptree(src)->layer_stride;
+      }
+      return;
+   }
+
+   assert(nvc0_2d_format_faithful(src->format));
+   assert(nvc0_2d_format_faithful(dst->format));
 
    for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
       ret = nvc0_2d_texture_do_copy(screen->base.channel,
@@ -233,15 +302,17 @@ nvc0_clear_render_target(struct pipe_context *pipe,
 
 	BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
 	OUT_RING  (chan, 1);
-	BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(0)), 8);
+	BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(0)), 9);
 	OUT_RELOCh(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 	OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 	OUT_RING  (chan, sf->width);
 	OUT_RING  (chan, sf->height);
 	OUT_RING  (chan, nvc0_format_table[dst->format].rt);
-	OUT_RING  (chan, mt->level[sf->base.u.tex.level].tile_mode);
-	OUT_RING  (chan, 1);
-	OUT_RING  (chan, 0);
+	OUT_RING  (chan, (mt->layout_3d << 16) |
+              mt->level[sf->base.u.tex.level].tile_mode);
+	OUT_RING  (chan, dst->u.tex.first_layer + sf->depth);
+	OUT_RING  (chan, mt->layer_stride >> 2);
+	OUT_RING  (chan, dst->u.tex.first_layer);
 
 	BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 2);
 	OUT_RING  (chan, ((dstx + width) << 16) | dstx);
@@ -272,6 +343,7 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe,
 	struct nvc0_surface *sf = nvc0_surface(dst);
 	struct nouveau_bo *bo = mt->base.bo;
 	uint32_t mode = 0;
+	int unk = mt->base.base.target == PIPE_TEXTURE_2D;
 
 	if (clear_flags & PIPE_CLEAR_DEPTH) {
 		BEGIN_RING(chan, RING_3D(CLEAR_DEPTH), 1);
@@ -293,13 +365,15 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe,
 	OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 	OUT_RING  (chan, nvc0_format_table[dst->format].rt);
 	OUT_RING  (chan, mt->level[sf->base.u.tex.level].tile_mode);
-	OUT_RING  (chan, 0);
+	OUT_RING  (chan, mt->layer_stride >> 2);
 	BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1);
 	OUT_RING  (chan, 1);
 	BEGIN_RING(chan, RING_3D(ZETA_HORIZ), 3);
 	OUT_RING  (chan, sf->width);
 	OUT_RING  (chan, sf->height);
-	OUT_RING  (chan, (1 << 16) | 1);
+	OUT_RING  (chan, (unk << 16) | (dst->u.tex.first_layer + sf->depth));
+	BEGIN_RING(chan, RING_3D(ZETA_BASE_LAYER), 1);
+	OUT_RING  (chan, dst->u.tex.first_layer);
 
 	BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 2);
 	OUT_RING  (chan, ((dstx + width) << 16) | dstx);
diff --git a/src/gallium/drivers/nvc0/nvc0_tex.c b/src/gallium/drivers/nvc0/nvc0_tex.c
index 6822e597b36..24850b19986 100644
--- a/src/gallium/drivers/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nvc0/nvc0_tex.c
@@ -22,12 +22,16 @@
 
 #include "nvc0_context.h"
 #include "nvc0_resource.h"
-#include "nv50_texture.xml.h"
+#include "nv50/nv50_texture.xml.h"
 
 #include "util/u_format.h"
 
+#define NV50_TIC_0_SWIZZLE__MASK                      \
+   (NV50_TIC_0_MAPA__MASK | NV50_TIC_0_MAPB__MASK |   \
+    NV50_TIC_0_MAPG__MASK | NV50_TIC_0_MAPR__MASK)
+
 static INLINE uint32_t
-nv50_tic_swizzle(uint32_t tc, unsigned swz)
+nv50_tic_swizzle(uint32_t tc, unsigned swz, boolean tex_int)
 {
    switch (swz) {
    case PIPE_SWIZZLE_RED:
@@ -39,7 +43,7 @@ nv50_tic_swizzle(uint32_t tc, unsigned swz)
    case PIPE_SWIZZLE_ALPHA:
       return (tc & NV50_TIC_0_MAPA__MASK) >> NV50_TIC_0_MAPA__SHIFT;
    case PIPE_SWIZZLE_ONE:
-      return NV50_TIC_MAP_ONE;
+      return tex_int ? NV50_TIC_MAP_ONE_INT : NV50_TIC_MAP_ONE_FLOAT;
    case PIPE_SWIZZLE_ZERO:
    default:
       return NV50_TIC_MAP_ZERO;
@@ -55,10 +59,11 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
    uint32_t *tic;
    uint32_t swz[4];
    uint32_t depth;
-   struct nvc0_tic_entry *view;
+   struct nv50_tic_entry *view;
    struct nvc0_miptree *mt = nvc0_miptree(texture);
+   boolean tex_int;
 
-   view = MALLOC_STRUCT(nvc0_tic_entry);
+   view = MALLOC_STRUCT(nv50_tic_entry);
    if (!view)
       return NULL;
 
@@ -73,26 +78,28 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
 
    tic = &view->tic[0];
 
-   desc = util_format_description(mt->base.base.format);
+   desc = util_format_description(view->pipe.format);
 
    /* TIC[0] */
 
    tic[0] = nvc0_format_table[view->pipe.format].tic;
 
-   swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
-   swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
-   swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b);
-   swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a);
+   tex_int = FALSE; /* XXX: integer textures */
+
+   swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r, tex_int);
+   swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g, tex_int);
+   swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b, tex_int);
+   swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a, tex_int);
    tic[0] = (tic[0] & ~NV50_TIC_0_SWIZZLE__MASK) |
       (swz[0] << NV50_TIC_0_MAPR__SHIFT) |
       (swz[1] << NV50_TIC_0_MAPG__SHIFT) |
       (swz[2] << NV50_TIC_0_MAPB__SHIFT) |
       (swz[3] << NV50_TIC_0_MAPA__SHIFT);
 
-   /* tic[1] = mt->base.bo->offset; */
+   tic[1] = /* mt->base.bo->offset; */ 0;
    tic[2] = /* mt->base.bo->offset >> 32 */ 0;
 
-   tic[2] |= 0x10001000 | /* NV50_TIC_2_NO_BORDER */ 0x40000000;
+   tic[2] |= 0x10001000 | NV50_TIC_2_NO_BORDER;
 
    if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
       tic[2] |= NV50_TIC_2_COLORSPACE_SRGB;
@@ -106,6 +113,13 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
 
    depth = MAX2(mt->base.base.array_size, mt->base.base.depth0);
 
+   if (mt->base.base.target == PIPE_TEXTURE_1D_ARRAY ||
+       mt->base.base.target == PIPE_TEXTURE_2D_ARRAY) {
+      /* there doesn't seem to be a base layer field in TIC */
+      tic[1] = view->pipe.u.tex.first_layer * mt->layer_stride;
+      depth = view->pipe.u.tex.last_layer - view->pipe.u.tex.first_layer + 1;
+   }
+
    switch (mt->base.base.target) {
    case PIPE_TEXTURE_1D:
       tic[2] |= NV50_TIC_2_TARGET_1D;
@@ -133,7 +147,8 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
       tic[2] |= NV50_TIC_2_TARGET_2D_ARRAY;
       break;
    case PIPE_BUFFER:
-      tic[2] |= NV50_TIC_2_TARGET_BUFFER | /* NV50_TIC_2_LINEAR */ (1 << 18);
+      tic[2] |= NV50_TIC_2_TARGET_BUFFER | NV50_TIC_2_LINEAR;
+      break;
    default:
       NOUVEAU_ERR("invalid texture target: %d\n", mt->base.base.target);
       return FALSE;
@@ -166,7 +181,7 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
    boolean need_flush = FALSE;
 
    for (i = 0; i < nvc0->num_textures[s]; ++i) {
-      struct nvc0_tic_entry *tic = nvc0_tic_entry(nvc0->textures[s][i]);
+      struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
       struct nv04_resource *res;
 
       if (!tic) {
@@ -177,6 +192,8 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
       res = &nvc0_miptree(tic->pipe.texture)->base;
 
       if (tic->id < 0) {
+         uint32_t offset = tic->tic[1];
+
          tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
 
          MARK_RING (chan, 9 + 8, 4);
@@ -190,8 +207,8 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
          OUT_RING  (chan, 0x100111);
          BEGIN_RING_NI(chan, RING_MF(DATA), 8);
          OUT_RING  (chan, tic->tic[0]);
-         OUT_RELOCl(chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
-         OUT_RELOC (chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
+         OUT_RELOCl(chan, res->bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+         OUT_RELOC (chan, res->bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
                     NOUVEAU_BO_HIGH | NOUVEAU_BO_OR, tic->tic[2], tic->tic[2]);
          OUT_RINGp (chan, &tic->tic[3], 5);
 
@@ -242,7 +259,7 @@ nvc0_validate_tsc(struct nvc0_context *nvc0, int s)
    boolean need_flush = FALSE;
 
    for (i = 0; i < nvc0->num_samplers[s]; ++i) {
-      struct nvc0_tsc_entry *tsc = nvc0_tsc_entry(nvc0->samplers[s][i]);
+      struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]);
 
       if (!tsc) {
          BEGIN_RING(chan, RING_3D(BIND_TSC(s)), 1);
diff --git a/src/gallium/drivers/nvc0/nvc0_transfer.c b/src/gallium/drivers/nvc0/nvc0_transfer.c
index a38bdb8f0a6..7bbfe057e58 100644
--- a/src/gallium/drivers/nvc0/nvc0_transfer.c
+++ b/src/gallium/drivers/nvc0/nvc0_transfer.c
@@ -4,7 +4,7 @@
 #include "nvc0_context.h"
 #include "nvc0_transfer.h"
 
-#include "nv50_defs.xml.h"
+#include "nv50/nv50_defs.xml.h"
 
 struct nvc0_transfer {
    struct pipe_transfer base;
@@ -14,7 +14,7 @@ struct nvc0_transfer {
    uint16_t nlayers;
 };
 
-static void
+void
 nvc0_m2mf_transfer_rect(struct pipe_screen *pscreen,
                         const struct nvc0_m2mf_rect *dst,
                         const struct nvc0_m2mf_rect *src,
@@ -243,35 +243,23 @@ nvc0_miptree_transfer_new(struct pipe_context *pctx,
    struct nvc0_miptree_level *lvl = &mt->level[level];
    struct nvc0_transfer *tx;
    uint32_t size;
-   uint32_t w, h, d, z, layer, box_h, box_y;
+   uint32_t w, h, d, z, layer;
    int ret;
 
    tx = CALLOC_STRUCT(nvc0_transfer);
    if (!tx)
       return NULL;
 
-   box_y = box->y;
-   box_h = box->height;
-
    if (mt->layout_3d) {
       z = box->z;
       d = u_minify(res->depth0, level);
       layer = 0;
-      tx->nlayers = box->depth;
    } else {
       z = 0;
       d = 1;
-      if (res->target == PIPE_TEXTURE_1D ||
-          res->target == PIPE_TEXTURE_1D_ARRAY) {
-         box_y = 0;
-         box_h = 1;
-         layer = box->y;
-         tx->nlayers = box->height;
-      } else {
-         layer = box->z;
-         tx->nlayers = box->depth;
-      }
+      layer = box->z;
    }
+   tx->nlayers = box->depth;
 
    pipe_resource_reference(&tx->base.resource, res);
 
@@ -280,7 +268,7 @@ nvc0_miptree_transfer_new(struct pipe_context *pctx,
    tx->base.box = *box;
 
    tx->nblocksx = util_format_get_nblocksx(res->format, box->width);
-   tx->nblocksy = util_format_get_nblocksy(res->format, box_h);
+   tx->nblocksy = util_format_get_nblocksy(res->format, box->height);
 
    tx->base.stride = tx->nblocksx * util_format_get_blocksize(res->format);
    tx->base.layer_stride = tx->nblocksy * tx->base.stride;
@@ -294,7 +282,7 @@ nvc0_miptree_transfer_new(struct pipe_context *pctx,
    tx->rect[0].base = lvl->offset + layer * mt->layer_stride;
    tx->rect[0].tile_mode = lvl->tile_mode;
    tx->rect[0].x = util_format_get_nblocksx(res->format, box->x);
-   tx->rect[0].y = util_format_get_nblocksy(res->format, box_y);
+   tx->rect[0].y = util_format_get_nblocksy(res->format, box->y);
    tx->rect[0].z = z;
    tx->rect[0].width = util_format_get_nblocksx(res->format, w);
    tx->rect[0].height = util_format_get_nblocksy(res->format, h);
diff --git a/src/gallium/drivers/nvc0/nvc0_transfer.h b/src/gallium/drivers/nvc0/nvc0_transfer.h
index 222f72d2748..803ee3463ec 100644
--- a/src/gallium/drivers/nvc0/nvc0_transfer.h
+++ b/src/gallium/drivers/nvc0/nvc0_transfer.h
@@ -35,4 +35,10 @@ struct nvc0_m2mf_rect {
    uint16_t cpp;
 };
 
+void
+nvc0_m2mf_transfer_rect(struct pipe_screen *pscreen,
+                        const struct nvc0_m2mf_rect *dst,
+                        const struct nvc0_m2mf_rect *src,
+                        uint32_t nblocksx, uint32_t nblocksy);
+
 #endif
diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c
index 166d965aa5b..b8db6fb6c12 100644
--- a/src/gallium/drivers/r300/r300_context.c
+++ b/src/gallium/drivers/r300/r300_context.c
@@ -194,14 +194,14 @@ static boolean r300_setup_atoms(struct r300_context* r300)
     /* ZB (unpipelined), SC. */
     R300_INIT_ATOM(ztop_state, 2);
     /* ZB, FG. */
-    R300_INIT_ATOM(dsa_state, is_r500 ? 8 : 6);
+    R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
     /* RB3D. */
     R300_INIT_ATOM(blend_state, 8);
     R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
     /* SC. */
     R300_INIT_ATOM(scissor_state, 3);
     /* GB, FG, GA, SU, SC, RB3D. */
-    R300_INIT_ATOM(invariant_state, 18 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
+    R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
     /* VAP. */
     R300_INIT_ATOM(viewport_state, 9);
     R300_INIT_ATOM(pvs_flush, 2);
@@ -349,7 +349,6 @@ static void r300_init_states(struct pipe_context *pipe)
         BEGIN_CB(invariant->cb, r300->invariant_state.size);
         OUT_CB_REG(R300_GB_SELECT, 0);
         OUT_CB_REG(R300_FG_FOG_BLEND, 0);
-        OUT_CB_REG(R300_GA_ROUND_MODE, 1);
         OUT_CB_REG(R300_GA_OFFSET, 0);
         OUT_CB_REG(R300_SU_TEX_WRAP, 0);
         OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h
index 6f2aab69ab1..58e1094e339 100644
--- a/src/gallium/drivers/r300/r300_context.h
+++ b/src/gallium/drivers/r300/r300_context.h
@@ -70,6 +70,7 @@ struct r300_blend_state {
 };
 
 struct r300_blend_color_state {
+    struct pipe_blend_color state;
     uint32_t cb[3];
 };
 
@@ -91,9 +92,24 @@ struct r300_dsa_state {
     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
     uint32_t cb_reg;
     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
+    uint32_t cb_reg1;
+    uint32_t alpha_value;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
+
+    /* The same, but for FP16 alpha test. */
+    uint32_t cb_begin_fp16;
+    uint32_t alpha_function_fp16;    /* R300_FG_ALPHA_FUNC: 0x4bd4 */
+    uint32_t cb_reg_seq_fp16;
+    uint32_t z_buffer_control_fp16;  /* R300_ZB_CNTL: 0x4f00 */
+    uint32_t z_stencil_control_fp16; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
+    uint32_t stencil_ref_mask_fp16;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
+    uint32_t cb_reg_fp16;
+    uint32_t stencil_ref_bf_fp16;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
+    uint32_t cb_reg1_fp16;
+    uint32_t alpha_value_fp16;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
 
     /* The second command buffer disables zbuffer reads and writes. */
-    uint32_t cb_no_readwrite[8];
+    uint32_t cb_zb_no_readwrite[10];
+    uint32_t cb_fp16_zb_no_readwrite[10];
 
     /* Whether a two-sided stencil is enabled. */
     boolean two_sided;
@@ -120,7 +136,7 @@ struct r300_gpu_flush {
     uint32_t cb_flush_clean[6];
 };
 
-#define RS_STATE_MAIN_SIZE 23
+#define RS_STATE_MAIN_SIZE 25
 
 struct r300_rs_state {
     /* Original rasterizer state. */
@@ -219,7 +235,7 @@ struct r300_vertex_stream_state {
 };
 
 struct r300_invariant_state {
-    uint32_t cb[26];
+    uint32_t cb[24];
 };
 
 struct r300_vap_invariant_state {
diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index 24c82a3efd2..e3945b72d7a 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -77,9 +77,15 @@ void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
     CS_LOCALS(r300);
 
     if (fb->zsbuf) {
-        WRITE_CS_TABLE(&dsa->cb_begin, size);
+        if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
+            WRITE_CS_TABLE(&dsa->cb_begin_fp16, size);
+        else
+            WRITE_CS_TABLE(&dsa->cb_begin, size);
     } else {
-        WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
+        if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
+            WRITE_CS_TABLE(dsa->cb_fp16_zb_no_readwrite, size);
+        else
+            WRITE_CS_TABLE(dsa->cb_zb_no_readwrite, size);
     }
 }
 
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index b810f4081c8..2b0c8750554 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -24,6 +24,7 @@
 #include "draw/draw_context.h"
 
 #include "util/u_framebuffer.h"
+#include "util/u_half.h"
 #include "util/u_math.h"
 #include "util/u_mm.h"
 #include "util/u_memory.h"
@@ -191,6 +192,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
     uint32_t color_channel_mask = 0;  /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
     uint32_t rop = 0;                 /* R300_RB3D_ROPCNTL: 0x4e18 */
     uint32_t dither = 0;              /* R300_RB3D_DITHER_CTL: 0x4e50 */
+    boolean clamp = TRUE;
     CB_LOCALS;
 
     if (state->rt[0].blend_enable)
@@ -206,7 +208,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
         /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
          * this is just the crappy D3D naming */
         blend_control = R300_ALPHA_BLEND_ENABLE |
-            r300_translate_blend_function(eqRGB) |
+            r300_translate_blend_function(eqRGB, clamp) |
             ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
             ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
 
@@ -267,7 +269,8 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
          *
          * Equations other than ADD are rarely used and therefore won't be
          * optimized. */
-        if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
+        if (clamp &&
+            (eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
             (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
             /* ADD: X+Y
              * REVERSE_SUBTRACT: Y-X
@@ -306,7 +309,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
         if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
             blend_control |= R300_SEPARATE_ALPHA_ENABLE;
             alpha_blend_control =
-                r300_translate_blend_function(eqA) |
+                r300_translate_blend_function(eqA, clamp) |
                 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
                 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
         }
@@ -395,22 +398,64 @@ static void r300_set_blend_color(struct pipe_context* pipe,
                                  const struct pipe_blend_color* color)
 {
     struct r300_context* r300 = r300_context(pipe);
-    struct r300_blend_color_state* state =
+    struct pipe_framebuffer_state *fb = r300->fb_state.state;
+    struct r300_blend_color_state *state =
         (struct r300_blend_color_state*)r300->blend_color_state.state;
+    struct pipe_blend_color c;
+    enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0;
     CB_LOCALS;
 
+    state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
+    c = *color;
+
+    /* The blend color is dependent on the colorbuffer format. */
+    if (fb->nr_cbufs) {
+        switch (format) {
+        case PIPE_FORMAT_R8_UNORM:
+        case PIPE_FORMAT_L8_UNORM:
+        case PIPE_FORMAT_I8_UNORM:
+            c.color[1] = c.color[0];
+            break;
+
+        case PIPE_FORMAT_A8_UNORM:
+            c.color[1] = c.color[3];
+            break;
+
+        case PIPE_FORMAT_R8G8_UNORM:
+            c.color[2] = c.color[1];
+            break;
+
+        case PIPE_FORMAT_L8A8_UNORM:
+            c.color[2] = c.color[3];
+            break;
+
+        default:;
+        }
+    }
+
     if (r300->screen->caps.is_r500) {
-        /* XXX if FP16 blending is enabled, we should use the FP16 format */
         BEGIN_CB(state->cb, 3);
         OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
-        OUT_CB(float_to_fixed10(color->color[0]) |
-               (float_to_fixed10(color->color[3]) << 16));
-        OUT_CB(float_to_fixed10(color->color[2]) |
-               (float_to_fixed10(color->color[1]) << 16));
+
+        switch (format) {
+        case PIPE_FORMAT_R16G16B16A16_FLOAT:
+            OUT_CB(util_float_to_half(c.color[2]) |
+                   (util_float_to_half(c.color[3]) << 16));
+            OUT_CB(util_float_to_half(c.color[0]) |
+                   (util_float_to_half(c.color[1]) << 16));
+            break;
+
+        default:
+            OUT_CB(float_to_fixed10(c.color[0]) |
+                   (float_to_fixed10(c.color[3]) << 16));
+            OUT_CB(float_to_fixed10(c.color[2]) |
+                   (float_to_fixed10(c.color[1]) << 16));
+        }
+
         END_CB;
     } else {
         union util_color uc;
-        util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
+        util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
 
         BEGIN_CB(state->cb, 2);
         OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
@@ -537,29 +582,54 @@ static void*
             r300_translate_alpha_function(state->alpha.func) |
             R300_FG_ALPHA_FUNC_ENABLE;
 
-        /* We could use 10bit alpha ref but who needs that? */
         dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
+        dsa->alpha_value = util_float_to_half(state->alpha.ref_value);
 
-        if (caps->is_r500)
+        if (caps->is_r500) {
+            dsa->alpha_function_fp16 = dsa->alpha_function |
+                                       R500_FG_ALPHA_FUNC_FP16_ENABLE;
             dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
+        }
     }
 
-    BEGIN_CB(&dsa->cb_begin, 8);
+    BEGIN_CB(&dsa->cb_begin, 10);
     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
     OUT_CB(dsa->z_buffer_control);
     OUT_CB(dsa->z_stencil_control);
     OUT_CB(dsa->stencil_ref_mask);
     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
+    OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
+    END_CB;
+
+    BEGIN_CB(&dsa->cb_begin_fp16, 10);
+    OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
+    OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
+    OUT_CB(dsa->z_buffer_control);
+    OUT_CB(dsa->z_stencil_control);
+    OUT_CB(dsa->stencil_ref_mask);
+    OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
+    OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
     END_CB;
 
-    BEGIN_CB(dsa->cb_no_readwrite, 8);
+    BEGIN_CB(dsa->cb_zb_no_readwrite, 10);
     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
     OUT_CB(0);
     OUT_CB(0);
     OUT_CB(0);
     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
+    OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
+    END_CB;
+
+    BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10);
+    OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
+    OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
+    OUT_CB(0);
+    OUT_CB(0);
+    OUT_CB(0);
+    OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
+    OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
     END_CB;
 
     return (void*)dsa;
@@ -686,6 +756,8 @@ void r300_mark_fb_state_dirty(struct r300_context *r300,
     /* What is marked as dirty depends on the enum r300_fb_state_change. */
     if (change == R300_CHANGED_FB_STATE) {
         r300_mark_atom_dirty(r300, &r300->aa_state);
+        r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
+        r300_set_blend_color(&r300->context, r300->blend_color_state.state);
     }
 
     if (change == R300_CHANGED_FB_STATE ||
@@ -944,12 +1016,14 @@ static void* r300_create_rs_state(struct pipe_context* pipe,
     uint32_t line_stipple_value;    /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
     uint32_t polygon_mode;          /* R300_GA_POLY_MODE: 0x4288 */
     uint32_t clip_rule;             /* R300_SC_CLIP_RULE: 0x43D0 */
+    uint32_t round_mode;            /* R300_GA_ROUND_MODE: 0x428c */
 
     /* Point sprites texture coordinates, 0: lower left, 1: upper right */
     float point_texcoord_left = 0;  /* R300_GA_POINT_S0: 0x4200 */
     float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
     float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
     float point_texcoord_top = 0;   /* R300_GA_POINT_T1: 0x420c */
+    boolean vclamp = TRUE;
     CB_LOCALS;
 
     /* Copy rasterizer state. */
@@ -1072,6 +1146,12 @@ static void* r300_create_rs_state(struct pipe_context* pipe,
         }
     }
 
+    /* Vertex color clamping. FP20 means no clamping. */
+    round_mode =
+      R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
+      (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
+                  R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
+
     /* Build the main command buffer. */
     BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
     OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
@@ -1086,6 +1166,7 @@ static void* r300_create_rs_state(struct pipe_context* pipe,
     OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
     OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
     OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
+    OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
     OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
     OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
     OUT_CB_32F(point_texcoord_left);
diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h
index 06da04c7ad7..54dae1acd98 100644
--- a/src/gallium/drivers/r300/r300_state_inlines.h
+++ b/src/gallium/drivers/r300/r300_state_inlines.h
@@ -38,23 +38,24 @@ static INLINE int pack_float_16_6x(float f) {
 
 /* Blend state. */
 
-static INLINE uint32_t r300_translate_blend_function(int blend_func)
+static INLINE uint32_t r300_translate_blend_function(int blend_func,
+                                                     boolean clamp)
 {
     switch (blend_func) {
-        case PIPE_BLEND_ADD:
-            return R300_COMB_FCN_ADD_CLAMP;
-        case PIPE_BLEND_SUBTRACT:
-            return R300_COMB_FCN_SUB_CLAMP;
-        case PIPE_BLEND_REVERSE_SUBTRACT:
-            return R300_COMB_FCN_RSUB_CLAMP;
-        case PIPE_BLEND_MIN:
-            return R300_COMB_FCN_MIN;
-        case PIPE_BLEND_MAX:
-            return R300_COMB_FCN_MAX;
-        default:
-            fprintf(stderr, "r300: Unknown blend function %d\n", blend_func);
-            assert(0);
-            break;
+    case PIPE_BLEND_ADD:
+        return clamp ? R300_COMB_FCN_ADD_CLAMP : R300_COMB_FCN_ADD_NOCLAMP;
+    case PIPE_BLEND_SUBTRACT:
+        return clamp ? R300_COMB_FCN_SUB_CLAMP : R300_COMB_FCN_SUB_NOCLAMP;
+    case PIPE_BLEND_REVERSE_SUBTRACT:
+        return clamp ? R300_COMB_FCN_RSUB_CLAMP : R300_COMB_FCN_RSUB_NOCLAMP;
+    case PIPE_BLEND_MIN:
+        return R300_COMB_FCN_MIN;
+    case PIPE_BLEND_MAX:
+        return R300_COMB_FCN_MAX;
+    default:
+        fprintf(stderr, "r300: Unknown blend function %d\n", blend_func);
+        assert(0);
+        break;
     }
     return 0;
 }
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index d7a7928386f..996d9f74a60 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -56,6 +56,7 @@ static inline unsigned int r600_bc_get_num_operands(struct r600_bc *bc, struct r
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
@@ -105,6 +106,7 @@ static inline unsigned int r600_bc_get_num_operands(struct r600_bc *bc, struct r
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
 		case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
@@ -2980,57 +2982,12 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru
 			struct r600_bc_alu alu;
 
 			memset(&alu, 0, sizeof(alu));
-			alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+			alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
 			alu.src[0].sel = 0;
 			alu.src[0].chan = 3;
 
-			alu.dst.sel = i + 1;
-			alu.dst.chan = 3;
-			alu.dst.write = 1;
-			alu.last = 1;
-
-			if ((r = r600_bc_add_alu(&bc, &alu))) {
-				r600_bc_clear(&bc);
-				return r;
-			}
-
-			memset(&alu, 0, sizeof(alu));
-			alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
-			alu.src[0].sel = i + 1;
-			alu.src[0].chan = 3;
-
 			alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
-			alu.src[1].value = fui(1.0f / (float)elements[i].instance_divisor);
-
-			alu.dst.sel = i + 1;
-			alu.dst.chan = 3;
-			alu.dst.write = 1;
-			alu.last = 1;
-
-			if ((r = r600_bc_add_alu(&bc, &alu))) {
-				r600_bc_clear(&bc);
-				return r;
-			}
-
-			memset(&alu, 0, sizeof(alu));
-			alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
-			alu.src[0].sel = i + 1;
-			alu.src[0].chan = 3;
-
-			alu.dst.sel = i + 1;
-			alu.dst.chan = 3;
-			alu.dst.write = 1;
-			alu.last = 1;
-
-			if ((r = r600_bc_add_alu(&bc, &alu))) {
-				r600_bc_clear(&bc);
-				return r;
-			}
-
-			memset(&alu, 0, sizeof(alu));
-			alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT);
-			alu.src[0].sel = i + 1;
-			alu.src[0].chan = 3;
+			alu.src[1].value = (1l << 32) / elements[i].instance_divisor + 1;
 
 			alu.dst.sel = i + 1;
 			alu.dst.chan = 3;
@@ -3082,14 +3039,6 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru
 	r600_bc_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN));
 	r600_bc_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_NOP));
 
-	/* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
-	ve->fetch_shader = r600_bo(rctx->radeon, bc.ndw*4, 256, PIPE_BIND_VERTEX_BUFFER, 0);
-	if (ve->fetch_shader == NULL) {
-		r600_bc_clear(&bc);
-		return -ENOMEM;
-	}
-
-	ve->fs_size = bc.ndw*4;
 	if ((r = r600_bc_build(&bc))) {
 		r600_bc_clear(&bc);
 		return r;
@@ -3104,6 +3053,15 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru
 		fprintf(stderr, "______________________________________________________________\n");
 	}
 
+	ve->fs_size = bc.ndw*4;
+
+	/* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
+	ve->fetch_shader = r600_bo(rctx->radeon, ve->fs_size, 256, PIPE_BIND_VERTEX_BUFFER, 0);
+	if (ve->fetch_shader == NULL) {
+		r600_bc_clear(&bc);
+		return -ENOMEM;
+	}
+
 	bytecode = r600_bo_map(rctx->radeon, ve->fetch_shader, 0, NULL);
 	if (bytecode == NULL) {
 		r600_bc_clear(&bc);
diff --git a/src/gallium/state_trackers/egl/Makefile b/src/gallium/state_trackers/egl/Makefile
index 68643214060..53673a78a94 100644
--- a/src/gallium/state_trackers/egl/Makefile
+++ b/src/gallium/state_trackers/egl/Makefile
@@ -25,7 +25,7 @@ x11_OBJECTS = $(x11_SOURCES:.c=.o)
 
 wayland_INCLUDES = \
 	-I$(TOP)/src/gallium/winsys \
-	-I$(TOP)/src/egl/wayland \
+	-I$(TOP)/src/egl/wayland/wayland-egl \
 	-I$(TOP)/src/egl/wayland/wayland-drm \
 	$(shell pkg-config --cflags-only-I libdrm wayland-client)