diff options
| author | Ilia Mirkin <[email protected]> | 2015-01-04 18:03:20 -0500 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2015-01-05 00:34:33 -0500 |
| commit | fb1afd1ea5fd25d82c75c5c3a2aba0bcb53b6d47 (patch) | |
| tree | 82da8803c69b6d51404440c8156b8429b4b594da /src/gallium | |
| parent | 546425726387ffceb71989e08028c386d21dedfd (diff) | |
nv50/ir: fix texture offsets in release builds
assert's get compiled out in release builds, so they can't be relied
upon to perform logic.
Reported-by: Pierre Moreau <[email protected]>
Signed-off-by: Ilia Mirkin <[email protected]>
Tested-by: Roy Spliet <[email protected]>
Cc: "10.2 10.3 10.4" <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp index e283424844e..0d7612efe65 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp @@ -772,7 +772,8 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i) if (i->tex.useOffsets) { for (int c = 0; c < 3; ++c) { ImmediateValue val; - assert(i->offset[0][c].getImmediate(val)); + if (!i->offset[0][c].getImmediate(val)) + assert(!"non-immediate offset"); i->tex.offset[c] = val.reg.data.u32; i->offset[0][c].set(NULL); } diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 9c06d0477d2..c2341317b1a 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -754,7 +754,8 @@ NVC0LoweringPass::handleTEX(TexInstruction *i) assert(i->tex.useOffsets == 1); for (c = 0; c < 3; ++c) { ImmediateValue val; - assert(i->offset[0][c].getImmediate(val)); + if (!i->offset[0][c].getImmediate(val)) + assert(!"non-immediate offset passed to non-TXG"); imm |= (val.reg.data.u32 & 0xf) << (c * 4); } if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) { |