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authorJason Ekstrand <[email protected]>2017-05-08 09:20:21 -0700
committerJason Ekstrand <[email protected]>2017-05-09 15:07:47 -0700
commitb86dba8a0eee6be283a96481c0c2b1fb1e882824 (patch)
tree5a8bfc6bff9ef65ab733327305026f2731f3096e /src/gallium
parentd4fa0a0fa63c538b0c67ec3c46a45c1e4dcf91fc (diff)
nir: Embed the shader_info in the nir_shader again
Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/auxiliary/nir/tgsi_to_nir.c14
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c4
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_shader.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_nir_lower_blend.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_program.c6
5 files changed, 14 insertions, 14 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index de33375cb52..1d68c220c01 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -315,8 +315,8 @@ ttn_emit_declaration(struct ttn_compile *c)
/* nothing to do for UBOs: */
if ((file == TGSI_FILE_CONSTANT) && decl->Declaration.Dimension) {
- b->shader->info->num_ubos =
- MAX2(b->shader->info->num_ubos, decl->Dim.Index2D);
+ b->shader->info.num_ubos =
+ MAX2(b->shader->info.num_ubos, decl->Dim.Index2D);
return;
}
@@ -374,7 +374,7 @@ ttn_emit_declaration(struct ttn_compile *c)
exec_list_push_tail(&b->shader->inputs, &var->node);
for (int i = 0; i < array_size; i++)
- b->shader->info->inputs_read |= 1 << (var->data.location + i);
+ b->shader->info.inputs_read |= 1 << (var->data.location + i);
break;
case TGSI_FILE_OUTPUT: {
@@ -440,7 +440,7 @@ ttn_emit_declaration(struct ttn_compile *c)
exec_list_push_tail(&b->shader->outputs, &var->node);
for (int i = 0; i < array_size; i++)
- b->shader->info->outputs_written |= 1 << (var->data.location + i);
+ b->shader->info.outputs_written |= 1 << (var->data.location + i);
}
break;
case TGSI_FILE_CONSTANT:
@@ -587,7 +587,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
src = nir_src_for_ssa(&load->dest.ssa);
- b->shader->info->system_values_read |=
+ b->shader->info.system_values_read |=
(1 << nir_system_value_from_intrinsic(op));
break;
@@ -1068,7 +1068,7 @@ ttn_kill(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
nir_intrinsic_instr *discard =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard);
nir_builder_instr_insert(b, &discard->instr);
- b->shader->info->fs.uses_discard = true;
+ b->shader->info.fs.uses_discard = true;
}
static void
@@ -1081,7 +1081,7 @@ ttn_kill_if(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if);
discard->src[0] = nir_src_for_ssa(cmp);
nir_builder_instr_insert(b, &discard->instr);
- b->shader->info->fs.uses_discard = true;
+ b->shader->info.fs.uses_discard = true;
}
static void
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 46d0525c93d..dfebb62b16b 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -204,7 +204,7 @@ compile_init(struct ir3_compiler *compiler,
}
so->num_uniforms = ctx->s->num_uniforms;
- so->num_ubos = ctx->s->info->num_ubos;
+ so->num_ubos = ctx->s->info.num_ubos;
/* Layout of constant registers, each section aligned to vec4. Note
* that pointer size (ubo, etc) changes depending on generation.
@@ -228,7 +228,7 @@ compile_init(struct ir3_compiler *compiler,
if (so->num_ubos > 0) {
so->constbase.ubo = constoff;
- constoff += align(ctx->s->info->num_ubos * ptrsz, 4) / 4;
+ constoff += align(ctx->s->info.num_ubos * ptrsz, 4) / 4;
}
unsigned num_driver_params = 0;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index 4ca96ce3bb2..65d64abe297 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -514,7 +514,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
uint64_t
ir3_shader_outputs(const struct ir3_shader *so)
{
- return so->nir->info->outputs_written;
+ return so->nir->info.outputs_written;
}
/* This has to reach into the fd_context a bit more than the rest of
diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
index 2ed89ead55b..a28ebb5bb7c 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
@@ -494,7 +494,7 @@ vc4_nir_emit_alpha_test_discard(struct vc4_compile *c, nir_builder *b,
discard->num_components = 1;
discard->src[0] = nir_src_for_ssa(nir_inot(b, condition));
nir_builder_instr_insert(b, &discard->instr);
- c->s->info->fs.uses_discard = true;
+ c->s->info.fs.uses_discard = true;
}
static nir_ssa_def *
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 59368734d08..f1c40c06a0e 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1347,7 +1347,7 @@ emit_frag_end(struct vc4_compile *c)
}
uint32_t discard_cond = QPU_COND_ALWAYS;
- if (c->s->info->fs.uses_discard) {
+ if (c->s->info.fs.uses_discard) {
qir_SF(c, c->discard);
discard_cond = QPU_COND_ZS;
}
@@ -2158,7 +2158,7 @@ ntq_emit_impl(struct vc4_compile *c, nir_function_impl *impl)
static void
nir_to_qir(struct vc4_compile *c)
{
- if (c->stage == QSTAGE_FRAG && c->s->info->fs.uses_discard)
+ if (c->stage == QSTAGE_FRAG && c->s->info.fs.uses_discard)
c->discard = qir_MOV(c, qir_uniform_ui(c, 0));
ntq_setup_inputs(c);
@@ -2583,7 +2583,7 @@ vc4_get_compiled_shader(struct vc4_context *vc4, enum qstage stage,
/* Note: the temporary clone in c->s has been freed. */
nir_shader *orig_shader = key->shader_state->base.ir.nir;
- if (orig_shader->info->outputs_written & (1 << FRAG_RESULT_DEPTH))
+ if (orig_shader->info.outputs_written & (1 << FRAG_RESULT_DEPTH))
shader->disable_early_z = true;
} else {
shader->num_inputs = c->num_inputs;