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authorMarek Olšák <[email protected]>2010-05-02 01:48:57 +0200
committerMarek Olšák <[email protected]>2010-05-02 12:56:33 +0200
commit5c6ea462be7c589d98887b822751bffd6df13418 (patch)
tree1f29ca210754c21440c99c2f8ebfb53a1807ee4e /src/gallium
parentfc1be4a99425d09103bba9e06026f31f2b0142d2 (diff)
r300g: cache tiling flags to reduce the number of DRM calls
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_buffer.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
index 9824ada5b33..b8366498922 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
@@ -22,6 +22,8 @@ struct radeon_drm_buffer {
boolean flinked;
uint32_t flink;
+ uint32_t tileflags;
+ uint32_t pitch;
struct radeon_drm_buffer *next, *prev;
};
@@ -318,6 +320,9 @@ void radeon_drm_bufmgr_get_tiling(struct pb_buffer *_buf,
radeon_bo_get_tiling(buf->bo, &flags, &pitch);
+ buf->tileflags = flags;
+ buf->pitch = pitch;
+
*microtiled = R300_BUFFER_LINEAR;
*macrotiled = R300_BUFFER_LINEAR;
if (flags & RADEON_BO_FLAGS_MICRO_TILE)
@@ -333,7 +338,7 @@ void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf,
uint32_t pitch)
{
struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
- uint32_t flags = 0, old_flags, old_pitch;
+ uint32_t flags = 0;
if (microtiled == R300_BUFFER_TILED)
flags |= RADEON_BO_FLAGS_MICRO_TILE;
/* XXX Remove this ifdef when libdrm version 2.4.19 becomes mandatory. */
@@ -344,17 +349,15 @@ void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf,
if (macrotiled == R300_BUFFER_TILED)
flags |= RADEON_BO_FLAGS_MACRO_TILE;
- radeon_bo_get_tiling(buf->bo, &old_flags, &old_pitch);
-
- if (flags != old_flags || pitch != old_pitch) {
+ if (flags != buf->tileflags || pitch != buf->pitch) {
/* Tiling determines how DRM treats the buffer data.
* We must flush CS when changing it if the buffer is referenced. */
if (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs)) {
buf->mgr->rws->flush_cb(buf->mgr->rws->flush_data);
}
- }
- radeon_bo_set_tiling(buf->bo, flags, pitch);
+ radeon_bo_set_tiling(buf->bo, flags, pitch);
+ }
}
boolean radeon_drm_bufmgr_add_buffer(struct pb_buffer *_buf,