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authorKarol Herbst <[email protected]>2017-06-23 20:30:28 +0200
committerIlia Mirkin <[email protected]>2017-07-21 23:45:18 -0400
commitf9bfc9301466c3b0d4248627b301d2f37ce0c4ab (patch)
tree6b73a1cec74db233ee5fd89d070c613597e99404 /src/gallium
parent1d7c232fbdab3bda71f93669be2e11449aa63f8f (diff)
nv50/ir/tgsi: handle precise for most ALU instructions
Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Pierre Moreau <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 7bae9e5cac5..713331f5c40 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -3189,6 +3189,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode());
if (op == OP_MUL && dstTy == TYPE_F32)
geni->dnz = info->io.mul_zero_wins;
+ geni->precise = insn->Instruction.Precise;
}
break;
case TGSI_OPCODE_MAD:
@@ -3202,6 +3203,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
geni = mkOp3(op, dstTy, dst0[c], src0, src1, src2);
if (dstTy == TYPE_F32)
geni->dnz = info->io.mul_zero_wins;
+ geni->precise = insn->Instruction.Precise;
}
break;
case TGSI_OPCODE_MOV: