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authorEric Anholt <[email protected]>2016-10-05 09:21:37 -0700
committerEric Anholt <[email protected]>2016-10-06 18:09:24 -0700
commit7c7bcbbc7dc7b71e1e3bab69fbcbc8fcbe797cbc (patch)
tree14b46448f4e18718e54501c1d28ff9085a24088e /src/gallium
parentd4ae5ca823227214dd1f536e5f4058bede20b2dd (diff)
vc4: Drop destination register when it's unused.
This slightly reduces instructions on shader-db, but I think it's just perturbing register allocation -- the allocator should have always trivially colored these nodes, before. This commit is just to make QIR code failing more intelligible when register allocation fails.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/vc4/vc4_opt_dead_code.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_opt_dead_code.c b/src/gallium/drivers/vc4/vc4_opt_dead_code.c
index f516d388429..1838c394ff9 100644
--- a/src/gallium/drivers/vc4/vc4_opt_dead_code.c
+++ b/src/gallium/drivers/vc4/vc4_opt_dead_code.c
@@ -102,9 +102,30 @@ qir_opt_dead_code(struct vc4_compile *c)
continue;
}
+ if (qir_has_side_effects(c, inst))
+ continue;
+
if (inst->sf ||
- qir_has_side_effects(c, inst) ||
has_nonremovable_reads(c, inst)) {
+ /* If we can't remove the instruction, but we
+ * don't need its destination value, just
+ * remove the destination. The register
+ * allocator would trivially color it and it
+ * wouldn't cause any register pressure, but
+ * it's nicer to read the QIR code without
+ * unused destination regs.
+ */
+ if (inst->dst.file == QFILE_TEMP) {
+ if (debug) {
+ fprintf(stderr,
+ "Removing dst from: ");
+ qir_dump_inst(c, inst);
+ fprintf(stderr, "\n");
+ }
+ c->defs[inst->dst.index] = NULL;
+ inst->dst.file = QFILE_NULL;
+ progress = true;
+ }
continue;
}